I was under the impression that the CPUs beyond the original Pentium (I believe starting with the PPro) were a hybrid of both CISC and RISC methods. I remember going through this article back in 1999 from Ars Technica:

http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html

Incidentally, there's another followup almost 10 years later from that article, specifically in regards to mobile processors, and especially Atom:

http://arstechnica.com/articles/paedia/risc-vs-cisc-mobile-era.ars