The SCSI interface in the Plus was taken almost exactly from the Dr. Dobbs article and from 3rd party interface cards based on it. This resulted in several weaknesses. First, since these interfaces plugged into the ROM sockets, they had no access to the CPU's read/write line (can't write to ROM after all). There was also no access to the CPU's wait/ready line, so there was no hardware to synchronize the data from the SCSI chip to the rest of the CPU & memory. The work-around was to use the low address bit to activate the read/write line of the SCSI chip, so you read from an even-numbered address and wrote to an odd-numbered address. For synchronizing, you read the SCSI status byte repeatedly until it changed, then saved the data byte to RAM, and went back to wait for the next byte. This is the slow polled transfer that is the norm for Plusses. Some drivers did fast "blind" transfers, reading several bytes in a row without polling the status register. Risky, but if you had a drive fast enough to keep up, it worked.

Making the changes would have required both a new motherboard and new ROMs, but then there'd have been no difference between a Plus and an SE performance-wise.