Deep IIci rejuvenation, possible ROM select problem — #10

Post #10 by trag

Source Forum	68kMLA
Category	Hardware
Post Date	Fri, 5 Feb 2010 - 15:52
Original URL	https://68kmla.org/bb/threads/deep-iici-rejuvenation-possible-rom-select-problem.19657/

Post

All of the data bits of the onboard ROMs are indeed directly connected to the ROM SIMM slot. Also to RAM bank B. RAM bank A is also connected, but via 3-state bidirectional buffers. I imagine this is to multiplex the RAM banks.
The address bits, however, are NOT connected directly between any RAM or ROM. The large MDU ("Multiplexer Decoder Unit"?) chip located at UK11, seems to be in charge of address control, pending further investigation.

Interesting. I guess I only ever checked the data bits, which makes sense. I was determining the order D[0, 7], D[8, 15] etc., of the ROM chips with respect to the ROM SIMM, so I probably only ever traced the data pins.

Thank you for keeping us updated. Very cool stuff.