@Gorgonops, ok thanks, will try that.
I have another question about the ROM chip. it's a 128kx8, so it needs 17 lines of addresses in order to access the entire memory of the rom. The 65SC816 processor seems to be a 24-bit address bus. So not a problem. However, by looking at schematic, only A0-A15 seems to be defined/implemented.
Also, if you look at page 9 of the PDF, the ROM chip, pin 22 (A16) connects to a resistor and goes to ROM output Enable?
Can someone confirm or explain the behavior here?
Thank you.
Pitou!
I have another question about the ROM chip. it's a 128kx8, so it needs 17 lines of addresses in order to access the entire memory of the rom. The 65SC816 processor seems to be a 24-bit address bus. So not a problem. However, by looking at schematic, only A0-A15 seems to be defined/implemented.
Also, if you look at page 9 of the PDF, the ROM chip, pin 22 (A16) connects to a resistor and goes to ROM output Enable?
Can someone confirm or explain the behavior here?
Thank you.
Pitou!