The processor card is what determines the system bus speed.

Click to expand...

That's backward, isn't it? The system has to be in-time, and that's given by a master oscillator crystal to which the memory and processor must obey. In Apple IIs and the early Macintoshes, the system bus, processor, and RAM all ran at the same speed. Today, we have processors which run twice as fast as the RAM, and must then wait, leading to some inefficiency. Therefore, on-board processor caches become much more necessary, since they can be accessed more quickly than the external RAM.

Click to expand...

If cost weren't an issue, the memory bus would run at its own optimal speed, the CPU and the CPU's bus at their own, I/O on its own, et cetera. In many systems this happens, but it's just as easy to clock everything from one source so everything is some multiple, fraction, or combination. Sometimes synchronous busses can be more efficient when they're shared and the sharing is based on the synchronized access by alternating uses - that way the bus gets 100% usage.

In the case of PowerMacs with CPU cards, the CPU card has the main oscillator which is used for the CPU, the memory bus and the L2 timing. Of course it'd have been nice if all machines ran the memory bus at 50 MHz, but it'd be hard to get 120, 166 or 233 MHz from a 50 MHz base clock.

In every instance since the late 1980s, CPUs are faster than memory, which is why the CPU speed is decoupled from memory speed. But using one clock base to drive memory and CPU just simplifies things.