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Home▸ Forums▸ Conquest: Powermac 9600 — #11▸ Conquest: Powermac 9600 — #11
Post #11 by trag
Source ForumConquest: Powermac 9600 — #11
CategoryHardware
Post DateThu, 19 Jul 2012 - 18:31
Original URLhttps://68kmla.org/bb/threads/conquest-powermac-9600.25863/
Post
Yes, I've used two different PCI PC-flashed Radeon 7000s in my 9600. I think the 7000 is a good card to flash as most are of reference design.
I flashed scores of PCI R7000s made by Sapphire and they all worked just like an ATI built unit, but with twice the VRAM.

However, on the ones I flashed, I physically removed the 25P05 serial flash chip and replaced it with the larger capacity 25P10 serial flash which the Mac firmware needs. I think a lot of the folks who flashed those kept the 25P05 and used a hacked/reduced version of the R7000 Firmware which squeezed into the smaller flash and probably didn't work as well.

The 9600 is picky about card placement; I recall the MACH-V based variant is even pickier. It takes some shuffling of cards to get things right sometimes. IIRC the top slot is bus-mastered and takes highest priority, so best for ATA/SATA/SCSI cards, and then the video card, next up things like FW/USB/lesser cards.
[NITPICK]I know that bus mastering canard has been quoted at xlr8yourmac.com and propagated from there, but it just isn't true. Or rather, it is true, but not relevant.

All the PCI slots in any Mac are bus mastering slots. Every last one of them.

There are two possible reasons (and perhaps other undocumented ones) why a PCI card might work best in the first slot.

1) The firmware for the cards is loaded at boot time in order. Being in the first slot means that your firmware gets loaded first. This shouldn't matter, but it might.

2) A specific way in which #1 matters is that (IIRC, this is documented in Apple's PCI slot materials) block transactions (I think) are only available to the first card to reserve an area of address space corresponding to some cache line or lines. If a later card comes along whose address space has the same corresponding cache lines, then block transfers are disabled for that card.

I may have explained that completely wrong. The memory is really hazy, but that's the gist, possibly with all the terms such as block transfers and cache lines wrong.

In theory, in the 9500/9600, the best PCI performance should be found in the lower three slots, and amongst those, in the first one. So slot 4 should probably have the best performance.

You see, the upper three slots are really the upper four slots, with the fourth upper slot being all of the 9600's built-in I/O. The Grand Central chip is a PCI device, and it shares bandwidth with the upper three slots.[/NITPICK]

mp.ls