The newer ACARD SCSI IDE bridges don't have this limitation, the older ones do.
It's a limitation of the IDE controller that is on the bridge, not on the computer. SCSI doesn't handle drive sectors directly, and the limitation is with IDE's Logical Block Addressing Scheme. All SCSI sees is a big storage space with read/write and other instructions.

That's why SCSI drives are more expensive: All the disk controller activity is in the drive's electronics in SCSI, in IDE it's on the motherboard. Sort of like comparing full modems and Express Modems (and WinModems).

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Not quite, in this case. The controller/drive dichotomy died with ESDI back in the early 1990s; all drives these days have full controllers on them. The real issue is what the host adapter is capable of.

Some HAs set up DMA transactions such that they need to know the block addresses on the drive, and because LBA48 is "overloaded" on the bus using stacked writes (just like the row and column addresses on DRAM), the hardware either needs to know how to stack the addresses, or needs to ignore them entirely and only DMA the data in and out (IIRC Intel's chipsets do the latter). For bridge boards, it depends on their internal wiring and how the firmware sets up IDE commands; it could require a hardware update in som.e cases, but most of the time a firmware patch will do.

There's actually an analogous situation in SCSI-land; it'd be like having a really old bus-mastering SCSI HA (or a SCSI-ST506 bridge, for that matter) that can't handle I/O past READ(6) or WRITE(6). (The 10-byte versions support 32-bit LBAs and have been in SCSI since 1987, so this would be pretty unlikely, but still.)