Text content (OCR)
JANUARY 1976 $1.50
D
the small sy
Dy,
Build a Light Pen
What's Inside an LSI-II?
Using Memory Address Space
Golf Handicapping By Computer
Introducin
...the world’s
lowest cost
computer system
JO
JOLT™ is the new, fully-tested microcomputer with the exclusive on-board DEMON™ debug
monitor. You can build it, plug it in and talk to it in three hours orless . . . fora price of just $249!
The basic JOLT™ card includes an 8-bit
MOS Technology Model 6502 CPU, which
requires no clock, can directly address
65k of memory, has two index registers,
58 instructions with 11 addressing
modes, two interrupts and includes both
single step and address halt capability.
And that’s only a part of it.
JOLT’s® CPU card is available
IMMEDIATELY* in either kit form or as-
sembled ($249 for the kit in single quantity
and $348 assembled). Either way, the
JOLT® CPU is completely tested prior to
delivery. It comes complete with a termi-
nal interface (TTY or EIA) and a unique
software DEbugger/MONitor called
DEMON®, for which full documentation is
provided. It is very easy to program, and
any JOLT® delivery includes an easy-to-
follow assembly instruction manual, show-
ing you exactly how to put everything
together . . . correctly. Complete assem-
bly should take you no more than three
hours if you choose the CPU in kit form.
Besides the JOLT® CPU — the 6502 from
MOS Technology — the basic JOLT®
card has a fully static memory accom-
modating 512 bytes of the user RAM. The
JOLT® CPU memory also has 64 bytes of
interrupt vector RAM. ROM Program
memory on the basic card consists of 1k
bytes of monitor/debugger with an au-
tomatic Power-On bootstrap program
— so you can start talking to JOLT® and it
to you as soon as you plug it in to your
terminal. On-board Input/Output devices
on the JOLT® CPU card include TTY 20
milliamp current loop and an EIA inter-
face, both full duplex. The card has high
speed reader interface lines and 16 fully
programmable user |/O lines with full TTL
drive.
Nobody, but nobody, except MAI can
offer you an on-board debugger/monitor
like DEMON®. It’s fully documented,
too.
The exclusive DEMON® Debug Monitor
really makes JOLT® one of the most out-
standing computer systems offered at any
time, at any price. Even without DEMON®
and its superior software features, JOLT?
is the lowest cost computer system in exis-
tence. And DEMON® is a bonus you'll *
have to use to believe. First, it self-adapts
y
All kits are delivered with a complete instruction manual and packaged for easy visual identifica-
tion of parts to aid you in assembly.
to any terminal speed from 10-30 CPS.
With it, you can display and alter your CPU
register and memory locations, plus you
can read, write and punch Hex formatted
data with Write/Punch BNPF format
data for PROM programmers. !t has unli-
mited breakpoint capability along with
separate non-maskable interrupt entry
and identification. External device inter-
rupts can be directed to any location you
choose, or they can be defaulted to
DEMON® recognition. DEMON® also
gives you (1) a completely protected ROM
resident debug/monitor; (2) the capability
to begin execution at any location in mem-
ory; (3) the capability to bypass DEMON®
entirely to permit full control by you over
your system; (4) a high-speed 8-bit parallel
input option; and (5) it includes user calla-
ble DEMON® 1/O subroutines. MOST IM-
PORTANT, DEMON® IS INCLUDED AS
STANDARD WITH ANY JOLT® CPU KIT
OR ASSEMBLED BOARD!
Obviously, the JOLT® basic card is a
computer in and of itself. But you can add
significantly to its capacity and versatil-
ity by adding 4k RAM JOLT™ memories
— in one card or a whole bunch. A RAM
card kit is only$265 ($320 assembled).
Now. 4096 Bit RAM 4K BYTE
The JOLT® memory card is a fully static
4,096-bit Random Access Memory (RAM)
with 1 microsecond access time and on-
board decoding. It is also available now.*
And the quantity of one price is what you
might expect to pay in quantities of
100 . . . very inexpensive!
There’s also a JOLT® 1/0 card for you,
our Peripheral Interface Adapter. You
can’t beat the price — single kit 96
bucks — or the function.
Pictured above is the assembled JOLT® CPU
card with DEMON®. just plug it in and you're
ready to go.
The JOLT® PIA (Peripheral Interface
Adapter) /O card includes two PIA LSI
chips, 32 input/output lines, two interrupt
lines, on-board decoding and standard
TTL drive. It is also fully programmable
and available IMMEDIATELY* in either kit
or assembled form... at a very attractive
single unit price ($140 assembled).
Considering the function and capacity of
the JOLT® Power Supply Card, you
probably think the quantity of one price
— $145 — is a misprint. It isn’t.
The JOLT® family also includes a power
supply card, which operates at any of
three voltages — +5, +12 and -10. The
power supply supports the basic JOLT
CPU card, plus 4,096 bytes of RAM and
\/O. The only two words for the price are
“dirt cheap.” It is available for delivery
immediately with a single unit kit price of
$145 ($190 assembled)
The assembled power supply card shown
above powers the JOLT® CPU, 1/0, and RAM
Memory cards.
You can also choose a blank JOLT™ uni-
versal card. Or several.
The JOLT® Universal card is completely
nude. It's a blank you can use any way
you wish, for control panels, T.V. inter-
faces, keyboards, LED's, or any other in-
terface logic, because the card's holes
are drilled to accept 14, 16, 24, or 40 pin
sockets and has the same form factor as
the other JOLT® cards. The single unit
price is just $285.
If you think you need extra cables, wires
and the like, choose a Super Value
JOLT Accessory Bag. A $55 Value for
just $40.
The JOLT®™ Accessory Bag includes 25
separate parts, enough hardware to con-
nect one JOLT™ card to another. Order an
Accessory Bag for each additional JOLT™
card. The Bag contains such necessary
items as flat cable, connectors, cord
spacers, hardware, wire, etc.
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°
°
THE JOLT PLAIN ENGLISH WARRANTY
All components in the JOLT® family are
new and fully tested prior to shipment. Kit
components are fully warranted during the
first 60 days of ownership. Assembled
parts are fully warranted during the first 6
months of ownership. If your properly as-
sembled kit does not work, just ship your
order back to Microcomputer Associates
Inc. and we'll repair, replace, or refund
your money.
coe
Cececcccccccccccccccs
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20% BONUS
NOW! Special ONE TIME BONUS DISCOUNT.
Order one CPU before November 10, 1975 and
deduct 20% off of all additional cards and ac-
cessories. (Note: Discount does not apply to
CPU cards, assembled or unassembled.)
We told you JOLT™ was the world’s lowest priced computer system. These prices prove it.
JOLT KITS
{ALL PAYMENTS MUST BE IN U.S. DOLLARS)
QUANTITY PRICING
JOLT® ASSEMBLED PRICES
(ALL PAYMENTS MUST BE IN U.S. DOLLARS)
QUANTITY PRICING
14 5-19 20-49 50-99 100 up 1-4 5-19 20-49 50-99 100 up
JOLT® CPU $249 $235 $230 $225 $215 JOLT® CPU $348 $325 $320 $315 $305
JOLT® RAM 265 255 250 245, 235 JOLT® RAM 320 305 300 295 280
JOLT? VO 96 90 88 82 E JOLT® 10 140 125 120 115 105
JOLT® POWER JOLT® POWER,
SUPPLY 145 135 130 128 115 SUPPLY 190 175 170 165 150
ih
JOT ERSAL ag) ag tSt__ THE NEW JOLT” FROM MAI IS AVAILABLE ONLY ON A DIRECT BASIS.
JOLT® ACCESSORY USE THIS COUPON TODAY TO ORDER FROM may
BAC 40 36 34 32 30 rTTIM
ALL JOLT® KITS ARE DELIVERED COMPLETE WITH A DETAILED
AND ILLUSTRATED ASSEMBLY MANUAL
* Order will be shipped within 15 days.
/ Microcomputer Associates Inc.
111 Main St., Department G
Los Altos, Calif, 94022
Phone (415) 941-1977
\ ©1975 Pehaco Corporation
U
ll ae ae
This coupon will bring you a JOLT™! Complete and return it.
Here is my check, money order or credit card payment for the
following JOLT™ products. If a U.S. or Canadian order, please add
$4.86 for shipping, handling and insurance. (Orders to all other
countries are priced F.0.B. Los Altos and will be shipped FREIGHT
COLLECT.)
‘Send me immediately:
QUANTITY PRICE
=
PRODUCT.
JOLT® CPU KIT
JOLT RAM MEMORY KIT
JOLT® 10 KIT
JOLT® POWER SUPPLY KIT
JOLT® UNIVERSAL CARD
JOLT® ACCESSORY BAG
JOLT® CPU ASSEMBLED
JOLT® RAM MEMORY ASSEMBLED
JOLT® 1/0 ASSEMBLED
JOLT® POWER SUPPLY ASSEMBLED
TOTAL $
+U.S./CANADA SHIPPING/HANDLING/INSURANCE
NOTE: CALIFORNIA RESIDENTS, +6% SALES TAX
TOTAL REMITTANCE (U.S. DOLLARS ONLY) s
4.86
Mail Pehaco Corporation, JOLT® Sales Agents
YOUR Microcomputer Associates Inc. Dept. G
ORDER 111 Main St., Los Altos, Ca 94022
TO:
G
All orders subject to the prior approval of the manufacturer.
NOW! Special ONE TIME BONUS DISCOUNT.
Order one CPU before November 10, 1975 and 20%
deduct 20% off of all additional cards and ac- BONUS,
cessories. (Note: Discount does not apply to
CPU cards, assembled or unassembled.)
PLEASE CHARGE THE TOTAL TO MY CREDIT CARD:
BANKAMERICARD #
MASTER CHARGE #
20%
BONUS
include digit #)
My credit card expires on
SIGNATURE
All credit card orders must be signed)
| UNDERSTAND THAT ALL U.S. ORDERS WILL BE SHIPPED VIA U.P.S. AND ALL
INTERNATIONAL ORDERS WILL BE SHIPPED BY AIR. SEND MY ORDER TO:
NAME
ADDRESS
ORGANIZATION
ciry STATE zp
PHONE
‘inelude Area Cade)
*Make your check payable to: Microcomputer Associates Inc.
International Orders: Payment should be cabled to Account
#00417-06355 Bank of America, 215 So. Murphy
Avenue, Sunnyvale, California, USA, 94086
hy seme sey amy a ser sys sm se se ol
SOFTWARE —
@ 8 8 @ BB Bis the best thing to feed your computer! Makes it healthy! Gets rid of that dull, aimless, blinking
lights expression so many small systems exhibit these days. Feed your machine SOFTWARE! Make it feel good,
Machine will then perform services. That will make YOU feel good. Put your machine on a good SOFTWARE diet
like some of the following CHOW!
ASSEMBLER PROGRAMS FOR THE ‘8008
Discusses a “minimum length’ Assembler program that can reside in 2K of memory, plus a more sophisticated
version for those who have additional memory and desire a more powerful version. Included in this manual is a
thorough explanation of the fundamental concepts of an assembler’s operation, details on how to format the
“source listing,’ step-by-step analysis and presentation of subroutines, program flow charts, and assembled listings of
the programs! Price? A very reasonable $17.95.
AN 8008’ EDITOR PROGRAM
Describes variations of an ‘’Editor’’ program that can reside in 2K of memory. Additional memory may be used to
increase the size of the text buffer. The program enables one to manipulate “text'’ in order to create “source
listings” or perform other kinds of text preparation. Includes discussion of routines, flow charts, and assembled
listing. Priced at just $14.95.
8008’ MONITOR ROUTINES
Describes a ‘‘Monitor Control’ package that allows you to control the operation of your computer from an external
“keyboard” device. Various routines enable you to examine and modify memory locations and CPU registers, set
“breakpoints” and execute programs for ‘debugging’ purposes, control bulk storage I/O devices, and perform other
useful functions. This manual comes complete with subroutine explanations, flow charts, and an assembled, highly
commented program listing. Low priced at just $11.95.
NEW! — FOR HUNGRY 8080 MACHINES!
AN 80 80’ ASSEMBLER PROGRAM
This assembler program utilizes some of the unique routines we utilized in our popular ‘8008’ assembler which
enables us to provide an ‘8080’ assembler that operates comfortably in 4K bytes of RAM (including the symbol
table). An unusual feature of this assembler program is that it has been designed to accept mnemonics closely related
to those used by SCELBI for our’8008' based machines. What this means is that programs originally written for an
‘8008’ unit can be directly processed by this assembler to produce object code for an ‘8080’ machine! NEAT! Of
course, it also handles the extended instruction set of the ‘8080’ as well. This program is provided in our popular
style of a manual that discusses the major routines, presents pertinent flow charts, and includes a highly commented
assembled listing. $17.95.
AN 8080’ EDITOR PROGRAM
This is essentially a “carbon copy” of the material in our earlier manual describing a ‘8008’ Editor, except the
assembled listing is provided with the machine code for an ‘8080.’ It is a good deal at $14.95.
‘8080’ MONITOR ROUTINES
These routines perform the same types of functions as described above for the ‘8008’ version except routines were
specifically developed to utilize the extended capabilities of the ‘8080’ instruction set. Great price at just $11.95.
WANT TO “SPOON FEED” YOUR MACHINE?
You CAN learn how to develop your own machine language programs. And, if you are really serious about utilizing a
small system effectively, you had better plan on learning something about it sooner or later! Here is a good way to
get started.
MACHINE LANGUAGE PROGRAMMING FOR THE
8.00 & (AND SIMILAR MICROCOMPUTERS)
THIS manual was written to provide the reader with the detailed knowledge one needs to know in order to
successfully develop machine language programs. This information packed publication discusses and provides
numerous examples of algorithms and routines that can be immediately applied to practical problems. Virtually all
the techniques and routines illustrated in the manual can also be applied to other similar microcomputers such as
8080" systems (by applicable machine code conversion). The price of this exciting new manual is a low $19.95.
(The floating-point arithmetic package presented in the publication is worth that price alone!)
Prices given are for domestic delivery at book mailing rate. Add $2.50 for each
publication if PRIORITY air service desired (U.S.) Overseas — include $6.00 for each
publication for airmail service.
(Pricing, specifications, availability subject to change without notice.)
Order direct from: 1322 REAR BOSTON POST ROAD
SCELBE COMPUTER & >:
MILFORD CONNECTICUT 06460
CONSULTING INC
In the Queue
Foreground
LET THERE BE LIGHT PENS ......... 00000 ece eee e + 26
Hardware — Loomis
MPE line 4 seas aang PGCE TS ceeaee
Applications — Helmers
GOLF HANDICAPPING .....
Applications — Haller
PHOTOGRAPHIC NOTES ON WIRE WRAPPING ........! 56
Techniques — Helmers
Background
Nucleus
BYTE magazine is published
monthly by Green Publishing,
Inc., 70 Main St, Peter-
borough, New Hampshire
03458. Subscription rates are
$12 for one year worldwide.
Two years, $22. Three years,
$30. Second class postage
application pending at Peter-
borough, New Hampshire
03458 and at additional mail-
ing offices. Phone
603-924-7217. Entire contents
copyright 1975 by Green Pub-
lishing, Inc, Peterborough NH
03458, Address editorial
correspondence to Editor,
BYTE, 70 Main St, Peter-
borough NH 03458.
NEW MINI-MICROCOMPUTER SYSTEM ........ Hee: 12
Processors — Baker
HORROR STORY .......---- essere ee seeeanaemteere 31
Problems — Warren
TOTAL KITCHEN INFORMATION SYSTEM .........++ AQ
Systems — Lau
INTEL 8080 OP CODE TABLE .
Reference — Dittrich
MORE TO BLINKING LIGHTS THAN MEETS THE EYE . .52
Applications — Helmers
TAKING ADVANTAGE OF MEMORY ADDRESS SPACE . .60
System Design — Luscher
Style — Peshka
THE CT-1024 KIT .....-- 0. eee eee ee bees d eee eee weed 92
Review — Hogenson
In This BYTE ..
Beach Ball Software .
BOMB .........
For the Joules, It’s a Steal
Clubs, Newsletters
MITS Computer Caravan ...
That Didn't Take Long at All
Classified Ads . .
BYTE’s Bugs ..
Answers to December Word Hunt .
Sphere Rolls Into Town ..
Letters bene
Book Reviews eee
The BYTE Questionnaire .
Reader's Service . .
New BYTE phone: 603-924-7217
BUTE #5
JANUARY 1976
nooo
nt
“Bi
casts 1
In This BUTE
On the cover, artist Robert Tinney has provided a scene
depicting the combination of computers and golf handicapping
described by Dr. George Haller in his article.
How would you like a PDP-11/40 in your basement
computer room? The price would probably be too high for the
typical amateur. But Digital Equipment Corporation also
makes the LSI-11, a microcomputer which implements the
PDP-11/40 instruction set and inherits a wealth of existing
PDP-11 software. Turn to Bob Baker’s article on the LSI-11
for a summary.
How do you draw a picture on an oscilloscope display? Add
a Light Pen as described by Sumner Loomis, and you will be
able to add and delete points of light.
When the LIFE program can’t figure out a key code, it calls
DEFAULT, as described in LIFE Line 3. This issuc’s LIFE
Line 4 specifies the DEFAULT routine used to enter cursor
motion control data and numeric data for the KEY-
BOARD_INTERPRETER. As a combined hardware and
software system, the LIFE application enters the realm of
hardware for the first time with a simple circuit to interface
the cursor motion control keyboard and an ASCII keyboard
via the same input port.
Wire wrapping is a technique often used to assemble
circuits. Turn to Photographic Notes on Wire Wrapping for
some pointers for your own custom computer interfaces.
According to tradition, no computer is ever complete
without blinking lights. But There’s More to Blinking Lights
Than Meets the Eye, or the control panel designer’s utilitarian
motives. This issue provides a few ideas for using simple and
inexpensive LED indicators in ways far removed from the
traditional control panel application.
4
In the October BYTE, Richard Gardner commented on the
application of personal computers in household situations. In
this issue, Ted Lau continues on that theme with an article of
“structured speculation” on the Total Kitchen Information
System (TKIS).
Computers solve problems, right? One problem which
golfers have is calculating handicaps so that duffers can play
against pros in the same tournament. In Golf Handicapping
(or: Buy a New Peripheral with Money Earned from Your
Local Duffers), Dr. George Haller describes a program he
concocted to serve as the basis for a part time business
calculating golf handicaps at his country club. For readers with
teenage children, this might make a great opportunity for the
kids to make some money to help pay for college expenses
while learning how to run a business.
Computer systems have many resources which can be used
by the person who assembles or modifies the design. One
resource which is very important is the memory address space
inherent in the design of the computer. Taking Advantage of
Memory Address Spaces by James Luscher can provide
important improvements in speed and function of your
system.
What is style? In his article K or k?, Manfred Peshka
describes some notational conventions which apply to BYTE’s
unique combination of hardware and software information.
While the change of these standards is incomplete in this issue,
future BYTEs will employ the standard abbreviations and
units throughout.
What is one of the most useful peripherals? Why, the
television set of course. To use the TV you need an interface.
One such interface is the CT-1024 product by SWTPC
reviewed by Jim Hogenson.
Lowest Price in the World!
In January of 1975, MITS stunned the computer world with
the announcement of the Altair 8800 Computer that sells for
$439 in kit form.
Today MITS is announcing the Altair 680.
The Altair 680, built around the revolutionary new 6800
microprocessor chip, is the lowest priced complete computer on
the market. It is now being offered at the special,
low price of $345!
The Altair 680 comes with power
supply, front panel control board,
and CPU board inclosed in an
11" wide x 11” deep x4 11/16” case.
In addition to the 6800 processor,
the CPU board contains the following:
1. 1024 words of memory (RAM
2102 type 1024 x 1-bit chips).
2. Built-in Interface that can
be configured for
RS232 or 20 mA
Teletype loop
or 60 mA
Teletype.
3. Provisions for
1024 words of
ROM or PROM.
The Altair 680 can be
programmed from the front
panel switches or it can be
connected to a computer terminal (RS232) or a Teletype such as
an ASR-33 or surplus five-level Baudott Teletype (under $100).
The Altair 680 can be utilized for many home, commercial or
industrial applications or it can be used as a development system
for Altair 680 CPU boards. With a cycle time of 4 microseconds,
16-bit addressing, and the capability of directly addressing
65,000 words of memory and a virtually unlimited number of
1/O devices, the Altair 680is a very versatile computer!
Altair 680 Software
Software for the Altair 680 includes a monitor on PROM,
assembler, debug, and editor. This software will be
available to Altair 680 owners at a nominal cost.
Future software development will be influenced by
customer demand. MITS will sponsor lucrative software
contests to encourage the rapid growth of the Altair 680
software library. Programs in this library will be made
available to all Altair 680 owners at the cost of
printing and mailing.
Altair Users Group
All Altair 680 purchasers will receive a free one year
membership to the Altair Users Group. This group is the largest
of its kind in the world and includes thousands of Altair 8800and
680 users.
Members of the Altair Users Group are kept abreast of Altair
developments through the monthly publication, Computer
Notes.
Altair 680 Documentation
The Altair 680kit comes with complete documentation
including assembly manual, assembly hints manual, operation
manual, and theory manual. Assembled units come with
operation and theory manuals. Turnkey model and CPU boards
also include documentation.
NOTE: A complete set of Altair 680 manuals in
a 3-ring Altair binder is now available for $14.50
(regularly $25). Offer expires January 30, 1976.
Delivery
Personal checks take 2-3 weeks to
process while money
orders and credit card
purchases can be
processed in 1-3 days.
Delivery should be
30-60 days but this
can vary according to
order backlog, All
orders are handled
ona first come, first
served basis.
Altair 680 Prices
Altair 680 complete computer kit.
Altair 680 assembled and tested :
Altair 680T tumkey model (complete Altair 680 except
front panel control board) Kit Only
Altair 680 CPU board (including pc board, 6800 micro-
processor chip, 1024 word memory, 3 way interface
and all remaining components except power supply) . 195
Altair 680 CPU board assembled and tested............ $275
Option IC socket kit (contains 40 IC sockets. CPU,
memory and PROM sockets come with 680 kit)....... $ 29
Option cooling fan (required when expanding 680
internally)
Option cooling fan installed .
PROM kit (256 x 8-bit ultraviolet,
Connectors (Two sets of 25-pin connectors. Required
when interfacing 680 to external devices)...
Prices, delivery and specifications subject to change.
MUTES
“Creative Electronics”
uerque, NM 87108 505/262-1951
CALL FOR PAPERS-ACM °76
OCTOBER 20-22,1976...
HOUSTON
Our 1976 Annual Conference will be held October
20 — 22 in Houston. We feel that it will be one of
the most relevant ACM conferences ever held, both
for the practicing professional and the researcher. The
conference facilities in downtown Houston’s Regency
Hyatt House will be outstanding. You will find that
You are invited to submit a paper on any aspect of
computer research, development, or implementation.
High quality papers of a theoretical, state-of-the-art or
tutorial nature are welcome. The technical program for
ACM '76 will again be organized around the ACM
Special Interest Groups, although additional sessions
ACM ‘76 will be a place where you can enjoy your-
self, renew old acquaintances, make some new ones,
and participate in a serious technical discussion of the
problems and potential of our industry. Plan to attend.
will be provided for papers of general interest or those
not related to any SIG.
Papers must not have been previously presented or
published; they should not exceed 10 published pages,
including a 100-word abstract, bibliography, and illus-
trations; and they must be received in four copies by
March 1, 1976. All papers will be refereed either by the
SIG’s or by reviewers selected by the Technical Pro-
gram Committee. Notification of acceptance will be
made by May 1. If you intend to submit a paper, and
we sincerely hope that you do, please send in the
coupon below. If you have an idea for a good session
or some other technical program idea, please do the
same or start promoting your idea in your SIG ——
but do it now! Be a part of the spirit of ACM ‘76!
Olin Johnson
General Chairman, ACM ‘76
about the conference about the technical program
Be a part of the “Spirit of ACM '76" /
ASSOCIATION for COMPUTING MACHINERY
1976 ANNUAL CONFERENCE
Roger W. Elliott
Technical Program Chairman, ACM ‘76,
Department of Industrial Engineering
Texas A & M University
College Station, Texas 77843 (713) 845-5531
Name
Address
city
O11 intend to submit a technical paper.
Tentative title
State
SIG (optional).
(11 1 am enciosing a technical program suggestion.
1 Please call me. | would like to discuss an idea for the technical program.
IMIEWIORIES ARE MADE OF THESE:
s EROM BOARD
inTEGRATED KEES AK BY 3 RAM
CIRCUITS 8K By 8 BOARD. ..$352 (app $48 &We PROGRAM) BOARD $109.22
2102 1K Static RAM---sTILL onLy $1,95 4K By 8 BOARD...$200 (app $25 & We PROGRAM) ONE-THIRD OF A CENT PER BIT--- Our most popu-
GUARANTEED FASTER THAN 750 ns, Buy 2K By 8 BOARD. $125 (a lar memory kit. You get sockets for all ICs,
. ‘op $15 & WE PROGRAM) i fal =
100, take 20%; suy 1000, Taxe 30%, industrial-qual}ty plated-through board, lots
Now you can stuff up to 8K of your favorite soft~
of bypars Ing. Paes, regulators to share
the power load (less thermal problems, more
5203 2K EROM--- $9.50, THIS STATIC HHI]! ware----editor/assenbler or what have you----on |||[} reliability), typical 500 ns secess tine at
MEMORY IS FULLY PROGRAMMABLE AND MAY MII|| board. Program it yourself or have us do the pro-||I[M} 25°C, and buffered addresses and outputs (no
a -" i gramming, Just like the RAM kit, DIRECT ALTAIR Input presents more than 1 LPTTL load; out-
ia Race with UV LiGHT, Non-VOLATILE 8800 PLUG-IN COMPATIBLE. Includes sockets, bypas- puts can drive 2 standard TTL loads). May
1---$24.50, sing, industrial - quality plated ~- through board, be powered with 8 volts unregulated; or bi
ae ied 50, SIMILAR TO buffered addresses and outputs, on board regula- bypassing the on board regulators, with
HE 2 BUT GK OF MEMORY. tion. LOW POWER: Full 8K requires $A @ 5V, 150
MEMORY/PROCESSOR 8 BIT CHIP SET: ma @ -12V. File protect feature includes tine re~
$32.50 BRINGS You 8 oF our 2102s
AND AN 8008 MICROPROCESSOR.
+5V. Complete with assembly instructions
and logic print of the RAM board.
ceiver with real hysteresis to prevent false trig-
gering on noise. EXPANDABLE: If you buy our 2K
board and want to move on to bigger and better
things (like 8k}, all you add is more sockets and
EROMS. Your board doesn't become obsolete.
ALTAIR 9800 OWNERS, PLEASE NOTE:
THIS MEMORY BOARD KIT, LIKE OUR
OTHER MEMORY KITS, IS DIRECTLY
PLUG-IN COMPATIBLE WITH THE 8800.
‘S
We've got 4K by 8 boards pre-programmed with 8080 assembler, editor, and monitor rou-
EROM BOARD tines. $200 buys you the same quality and ALTAIR PLUG-IN COMPATIBILITY as our other
memory kits. Another advantage: because this is EROM rather than mask programming,
you can make changes if desired. Speaking of changes, although these routines work
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TITLE: Microcomputer Dictionary & Guide
AUTHOR: Charles J. Sipp!
This new microcomputer dictionary fills the urgent need for all computer people,
engineers, scientists, industrialists, communications people — as professionals,
amateurs, teachers, or students— to become quickly acquainted with the
terminology and nomenclature of a new revolution in computer control capa-
bilities in areas that pervade most of man’s daily activities.
Over 3500 definitions and explanations of terms and concepts (approx. 350
pages) relating to microprocessors, microcomputers and microcontrollers.
There are also separate appendices on: programmable calculators; math and
statistics definitions; flowchart symbols and techniques; binary number systems
and switching theory; symbol charts and tables; summaries of BASIC FORTRAN
and APL. In addition there is a comprehensive electronics/computer abbrevia-
tions and acronyms section. Price: $14.95,
MATRIX PUBLISHERS, INC.
Dept. BM, 207 Kenyon Road, Champaign, IL 61820
Please send me the new MICROCOMPUTER DICTIONARY under your I
15 day no risk trial guarantee. If payment accompanies order we pay
all shipping and handling charges. (Ill. customers add 5% sales tax) 1
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Beach Ball
Software
What a predicament. You've bought this
box full of printed circuit boards, trans-
former iron and integrated circuit silicon.
After long hours paying attention to the
details of an intricate assembly process it is
“done.” To the best of your abilities you’ve
verified that the box does what it is
supposed to do. Now it’s sitting over there
‘on the bench (or living room table (or office
desk)) plugged into the AC wall outlet and
grinning like a Cheshire cat with a mouth
full of LED or TVT teeth. So, now what do
you do with it? Like many objects of some
bulk and substance, it seems so useless — but
is it? There are lots of human designed
objects which at first sight appear to be
useless. But most turn out to have great
potential value which can be released by the
active and creative human mind. The secret
of use and enjoyment is the application of
that most characteristically human capacity
to think. The hobby created about these
artificial “brains” is an excellent training
ground for the human brain — one of the
secrets of its appeal.
But Then, What Good is a Beach Ball Either?
As an example of a simple object which
requires creativity to realize its potential,
consider a child’s beach ball. Imagine for a
moment that your newly constructed com-
puter kit is sitting on its pedestal and begins
slowly to change into a beach ball through
some advanced technological ‘‘magic.” Its
corners begin to round, the edges smooth
out, and after some moments of transforma-
tion it is a jolly round beach ball having the
same general properties the computer had: it
sits there looking useless to the skeptic.
As an intelligent and active being,
curiosity is one of your most admirable
traits. So you walk over to the pedestal, pick
up that beach ball and begin a thorough
examination of its characteristics. What do
you find? As you pick it up you verify that
it is a solid object which has the expected
weight of a beach ball. You rotate it about
several axes and verify that it is indeed a
Editorial
by
Carl Helmers
sphere within the limits of your perception.
Using an appropriate measuring tool you
find that its diameter is 30 cm. The surface
is resilient but hard. The ball slips out of
your hands and drops to the floor where its
resilience is confirmed by a healthy rebound.
After the examination, you put it back on
the pedestal. Again, the thought: what good
is a beach ball? It sits there with no life of its
own, not even condescending to wink an
LED at you. How could anyone possibly
shell out hard earned cash for such an
object?
Beach Ball Software
But peopie do shell out lots of hard
earned money for beach balls. And people
such as you and | are not fools when we buy
a quality beach ball. We know beach balls
are useful through our appreciation of fun
and advertising of the products. The beach
ball is the basic “hardware” required to play
numerous games; beach balls are even used
on occasion for more practical tasks. The
beach ball is a widely distributed standard
product with a simple design. Very little user
documentation is supplied by the manufac-
turers and distributors of beach balls. The
wide acceptance of the beach ball is due to
the numerous applications inherent in its
design. These applications await the creative
minds of human beings who decide what to
do with the ball and how to do it. Any game
or recreation which uses the beach ball as a
prop is an example of the ‘“‘beach ball
software.”’ Such games may have been made
up generations ago and stored in the form of
word of mouth learning, printed books or
magazines on the subject. Or, they may be
made up or reinvented spontaneously and
never recorded at all. Whatever the source,
the game and its rules form a method of
using the beach ball which takes advantage
of its properties, but is not in any way built
into the device.
So having temporarily approached the
problem from the point of view of a beach
ball, let's invert the transformation and turn
the object back into a computer. We still
BUTE
staff
PUBLISHERS
Virginia Green, President
Manfred Peshka, General Manager
EDITOR
Carl T. Helmers, Jr.
PRODUCTION EDITORS
Beth Alpaugh
Judith Havey
ASSOCIATES
Hal Chamberlin
Dan Fylstra
Don Lancaster
Chris Ryland
PRODUCTION DEPARTMENT
Lynn Panciera-Fraser, Manager
Nancy Estle
Neal Kandel
Peri Mahoney
Bob Sawyer
PHOTOGRAPHY
Ed Crabtree
Bill Heydolph
DRAFTING
Bill Morello
TYPESETTING
Barbara Latti, Manager
Marge McCarthy
PRINTING
Biff Mahoney
INVENTORY CONTROL
Marshall Raymond, Manager
Kim Johansson
CIRCULATION
Judy Waterman, Manager
Pat Geilenberg
Dorothy Gibson
Pearl Lahey
Deborah Luhrs
COMPTROLLER
Knud E. M. Keller
A manufacturer who
supplies a series of
interesting sample pro-
grams to illustrate the use
of his processor and
system is providing you
with a valuable service...
have not solved the problem of where to get
the specific creativity required for the com-
puter software, but the beach ball analogy
provides a useful model.
A computer system, like a beach ball, is
an incomplete system no matter how fully
supported by manufacturers’ software. No
manufacturer can tell you what you want to
do with the machine in complete detail. The
manufacturer can supply suggested uses and
build in features which make certain uses
inherently easy to program, but ultimately
the user of the computer must decide what
to program or when to use the programs
available. The beach ball system is com-
pleted when the beach ball user decides
upon a particular game or practical applica-
tion in which the beach ball is a key
element. It might be that the beach ball
simply makes the application easier to per-
form, or it might be that the beach ball is so
crucial that the application would not even
have been possible without that ball. The
computer system is also completed when
you — the user — decide how you want to
wD .
a
BOMB: svte's Ongoing Monitor Box
BYTE would like to know how readers evaluate the efforts of
the authors whose blood, sweat, twisted typewriter keys, smoking
ICs and esoteric software abstractions are reflected in these pages.
BYTE will pay a $50 bonus to the author who receives the most
points in this survey each month, (Editor Helmers is not eligible for
the bonus.) The following rules apply:
. Articles you like most get 10 points, articles you like least get
0 (or negative) points —- with intermediate values according to
your personal scale of preferences.
Use the numbers 0 to 10 for your ratings, integers only.
. Be honest, Can all the articles really be 0 or 10? Try to give a
preference scale with different values for each author.
. No ballot box stuffing: Only one entry per reader!
Fill out your ratings, and return it as promptly as possible along
with your reader service requests and survey answers. Do you like an
author’s approach to writing in BYTE? Let him know by giving him
acrack at the bonus through your vote.
Page LIKED
No. Article LEAST BEST
12 Mini-Microcomputer 012345678910
26 ight Pens 012345678910
31 Warren: Horror Story 0123456789 10
32 LIFE Line 4 012345678910
42 Lau: Kitchen Information System 0123456789 10
46 = Haller: Golf Handicapping 012345678910
50 Dittrich: Op Code Table 012345678910
52 Helmers: Blinking Lights 012345678910
56 Helmers: Wire Wrapping 012345678910
60 Luscher: Memory Address Space 012345678910
64 Peshka: K or k? 012345678910
92 Hogenson: CT-1024 Kit Review 012345678910
employ the computer. It might be that you
use the computer simply to improve the
efficiency of some menial task, or you might
use the computer in an application — such as
complex interactive games — which would
have been impossible to perform minus the
computer’s intelligence. Like any activity,
you get out of a computer rewards which are
in proportion to the effort applicd to under-
stand and “get into” the activity.
With computers — as with beach balls — it
is often possible to find a starting point in
this area of applications and software.
Creativity of the individuals who have pre-
viously thought about the subjects involved
can often be useful as a starting point. By
seeing concrete examples of the uses of the
computer systems, you can acquire a
valuable basic understanding of what can be
done. One obvious source of such informa-
tion is in the form of BYTE articles.
Another form is in the user support
packages provided by manufacturers. A man-
ufacturer who supplies a series of interesting
sample programs to illustrate use of his
processor and system is providing you with a
valuable service — you find out how things
are done with his computer in specific and
detailed examples. One excellent example of
such a service is the documentation which
can be purchased for the assembler and text
editor programs of the SCELBI computers —
complete listings of the programs with
detailed explanations and design information
are provided in the manuals for these
SCELB! program products. When evaluating
a computer system, look for such examples
in the documentation and compare the
offerings on this point. There are other
sources of information about the creative
uses of the computers of the world. Direct
information can often be acquired in the
context of the computer club, an association
of users for the purpose of solving problems,
exchanging ideas, filling in gaps in
knowledge, etc. When you talk to your
technological neighbor about what he or she
is doing, you can get valuable information
on the possible applications of your
machine; and of course your neighbor
receives similar benefits in return.
It is this kind of exchange of creativity
and ideas among interested individuals which
will make the personal computing field into
a well developed facet of our civilization,
growing out of the scattered and isolated
efforts of individuals who pioncered the
activity. One of the main reasons for BYTE
magazine’s very existence is to help foster
this transfer of information, to give our
readers the knowledge and ideas useful as
creative starting points for personal applica-
tions of computers, =
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CONTINENTAL SPECIALTIES CORPORATION
44 Kendall Street, Box 1942
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West Coast office: Box 7809, San Francisco. CA
94119 © 415-421-8872 TWX: 910-372-7992
Canada: Len Finkler Ltd., Ontario
© 1975 Continental Specialties Corp.
1
A New
Mini - Microcomputer
System
The Digital Equipment
Corporation LSI- II
Robert W. Baker
34 White Pine Dr.
Littleton MA 01460
Digital Equipment Corporation has a new
addition to the microcomputer market.
Designated the LSI-11, it is a complete 16
bit microcomputer system on a single 8.5
inch by 10 inch (21.6 cm by 25.4 cm)
printed circuit board, combining the instruc-
tion set of a PDP-11/40 with an under
$1000 price.
A 3.5 inch H by 19 inch W by 13.5 inch
D (8.9 cm by 48.3 cm by 34.3 cm) boxed
version of the LSI-11 is designed as an
off-the-shelf microcomputer system. Desig-
nated the PDP-11/03, it consists of an
LSI-11 microcomputer, serial line interface,
power supply, and a mounting box designed
to mount in a standard 19 inch cabinet.
Removing the front panel exposes the LS!
modules and cables allowing replacement or
installation of a module from the front of
the PDP-11/03. The power supply has three
front panel switches and _ indicators
accessible through a cutout in the front
panel. The lights and switches are still
attached to the power supply and functional
when the front panel is removed. Input
power of the PDP-11/03 is typically 190
Watts at full load.
LSI-11 Evolution
The processor, memory, device interfaces,
backplane and interconnecting hardware of
the LSI-11 are all modular in design to allow
custom tailoring necessary for specific appli-
cation requirements. It was not intended to
be a low end minicomputer, but to provide
minicomputer capability to the new micro-
computer applications.
12
To accomplish this goal, the LSI-11 was
designed to optimize system costs rather
than component costs. A four-chip micro-
programmed central processor was selected
to emulate the PDP-11 instruction set,
allowing the inclusion of automatic dynamic
memory refresh without additional cost. The
microprogrammed processor also makes
feasible user microcode and an ASCII con-
sole which will be discussed later.
Central Processor
The central processor module consists of
the microprogrammed processor and 4096
words of memory, together with the bus
transceivers and control logic. The four chip
microcomputer controls the time allocation
of the LSI-11 bus for peripherals and per-
forms all arithmetic and logic operations as
well as instruction decoding. Eight 16 bit,
general-pupose registers can be used as
accumulators, address pointers, index
registers, stack pointers, or other desired
functions. Arithmetic operations can be
from one register to another, from one
memory location or device register to
another, or between a memory location or a
device register and a general register. Data
transfers between IO devices and memory on
the bus occur without disturbing the
processor registers.
Bus
The bus, which is implemented on the
H9270 card guide backplane assembly, is the
data path which enables a complete system
to be configured. This bus was designed to
allow low cost peripheral interfaces for
microcomputer applications, rather than to
support the wide range of peripheral config-
urations common to large minicomputer
systems. The processor module is capable of
driving six device slots along the bus without
additional termination, as provided with the
H9720 backplane. Devices or memory can
be installed in any location along the bus, as
most bus control and data signals are bidirec-
tional, open-collector lines that are asserted
when low. The bus signals include 16 multi-
plexed data/address lines, 6 data transfer
control lines, 6 system control lines, and 5
interrupt and direct memory access (DMA)
control lines.
Any communication between two devices
on the bus is in the form of a master-slave
relationship. Only one device, the bus
master, can have control of the bus at any
point in time. The master device controls the
bus while communicating with another
device on the bus, the slave. Since the
LSI-11 bus is used by the processor and all
10 devices, there is a priority structure to
determine which device gets control of the
bus. Every device on the bus capable of
becoming bus master has a specific priority
associated with its position along the bus.
When two devices request use of the bus
simultaneously, the higher priority device
will receive control. All data transfers on the
bus are interlocked so that communication is
independent of the physical length of the
bus and the response time of the slave so
long as a bus timeout does not occur.
Asynchronous operation allows each device
to operate at the maximum possible speed.
Interrupt System
Interrupt and DMA handling incorporates
two daisy-chained grant signals. This method
eliminates device polling to service interrupt
requests and establishes an interrupt
priority. The highest priority device is the
module located electrically closest to the
microcomputer module. Only when a device
is not asserting a request does it pass grant
signals to lower priority devices. When an
interrupting device receives a grant, the
device passes to the processor an interrupt
vector which points to a new processor
status word (PSW) and the starting address
of an interrupt service routine for the device.
The current value of the PSW and program
counter (PC) are stored on the stack.
The processor operates with the interrupt
mask (PSW bit 7) set (1) or cleared (0).
When PSW bit 7 is equal to 1, no external
device can interrupt the processor with a
request for service. The processor must be
operating at PSW bit 7 equal to O for the
device’s request to be effective. Interrupts
can occur only between processor instruc-
tions since they change the state of the
processor. DMA operations, on the other
hand, may occur between individual bus
cycles since these operations do not change
the processor state.
One signal line on the bus functions as an
external event interrupt line to the
processor module. When connected to a 60
Hertz line frequency source, this signal line
can be used as a real-time clock interrupt.
When automatic interrupt dispatch (vec-
toring) is not needed, this line may be used
as a common interrupt signal. Although this
necessitates device polling (as in earlier
computers, such as the PDP-8), device inter-
faces may now be slightly less complicated.
A single connection on the processor module
enables or inhibits the external event
interrupt. When enabled, the device con-
nected to this line has a higher interrupt
priority than any device connected to the
daisy-chained grant signals.
Power Fail/Restart
To further increase the system flexibility,
several power fail/restart options are avail-
13
14
able. The power fail sequence is initiated
upon sensing a warning signal from the
power supply signaling an impending AC
power loss. The current PSW and PC are
pushed on the processor stack and a new PC
and PSW are taken from a vector at location
24. Normally, with non-volatile memory,
this routine would save processor registers,
set up a restart routine, and halt. When only
volatile memory is used, the registers cannot
be saved but the power fail trap does allow
an orderly system shutdown to occur.
When AC power is restored, one of the
four jumper selectable power-up options is
initiated. The first option is loading a pro-
grammed PSW and PC from the vector at
location 24. This would be used with non-
volatile memory to continue execution of
the program at the point where the power
fail occurred or to restart the program at an
arbitrary address with ROM _ program
storage. If the BHALT line on the bus (the
halt switch) is asserted during this power-up
sequence, the ASCII console microcode will
be entered immediately after loading the
PSW and PC. The second power-up option
causes an unconditional entry to the ASCII
console routines. The processor can then be
started by an ASCII console command
allowing remote system starting without
controlling the bus halt line. (More on the
ASCII console later.) Alternately, the last
two options allow program execution to
begin at a specified address in either macro-
code or microcode.
Memory
The 4096 word memory on the basic
CPU module consists of sixteen 4096 bit
dynamic RAMs. This memory logically
appears on the external bus while being
physically on the CPU module. Being
accessible to the bus allows external DMA
transfers to take place to and from the basic
4096 word memory. Also, an optional
jumper allows the CPU module memory to
occupy either the first or second 4096 word
block of the bus address space.
Various memory modules are available
for applications requiring more storage than
the standard 4096 word MOS memory on
the processor board. Those offered include a
non-volatile 4096 word core memory, a
1024 word static RAM, read-only memory
(PROM/ROM) with a maximum capacity of
4096 words per board in 512 word incre-
ments or 2048 words in 256 word incre-
ments, and a 4096 word dynamic MOS
RAM.
A common disadvantage of using
dynamic MOS memory is the necessity of
refreshing the contents of memory at
specific intervals. The refresh operation is
required to replace the stored charge in each
The MODULAR MICROS
from MARTIN RESEARCH
Here's why the new M/KE 2 and MIKE 3
are the best values in microcomputers to-
day!
8008 OR 8080
Martin Research has solved the problem
bothering many potential micro users
-... Whether to go with the economical
8008 microprocessor, or step up to the
powerful 8080. Our carefully designed
bus structure allows either processor to
be used in the same system!
The MIKE 3 comes with an 8080 CPU
board, complete with crystal-controlied
system timing. The M/KE 2 is based on
the 8008. To upgrade from an 8008 to
an 8080, the user unplugs the 8008 CPU
board and plugs in the 8080 CPU. Then
he unplugs the 8008 MONITOR PROM,
and plugs in the 8080 MONITOR
PROM, so that the system recognizes the
8080 instruction set. That’s about it!
If the user has invested in slow memory
chips, compatible with the 8008 but too
slow for the 8080 running at full speed,
he will have to make the 8080 wait for
memory access—an optional feature on
our boards. Better still, a 4K RAM board
can be purchased from Martin Research
with fast RAM chips, capable of 8080
speeds, at a cost no more that you might
expect to pay for much slower devices.
In short, the MIKE 2 user can feel confi-
dent in developing his 8008 system with
expanded memory and other features,
knowing that his M/KE 2 can be up-
graded to a MIKE 3—an 8080 system—in
the future.
EASE OF PROGRAMMING
Instructions and data are entered simply
by punching the 20-pad keyboard. Infor-
mation, in convenient octal format, ap-
pears automatically on the seven-
segment display. This is a pleasant con-
trast to the cumbersome microcom-
puters which require the user to handle
all information bit-by-bit, with a confus-
ing array of twenty-odd toggle switches
and over thirty red lights!
A powerful MONITOR program is in-
cluded with each microcomputer, stored
permanently in PROM memory, The
MONITOR continuously scans the key
board, programming the computer as
keys are depressed.
Say the user wishes to enter the number
135 (octal for an 8008 OUTPUT 16 in-
struction). He types 7, and the right-
hand three digits read 007. Then he
presses 3, and the digits say 073. Finally
he punches the 5, and the display reads
135. Notice how the MONITOR program
{Continued in column 3.)
QUICK.
what number is this?
@Oo 080 808
If you have to read your microcomputer
like this-bit by bit, from rows of lights--the
computer's making you do its work. And if
you have to use rows of toggle switches to
program it, you might wonder why they
call the computer a labor-saving device!
Contrast the layout of a typical pocket
calculator. A key for each number and
function; six easy-to-read digits. Why not
design microcomputers like that?
Here they are! The modular micros from
Martin Research. The keyboard programs
the computer, and the bright, fully-
decoded digits display data and memory
addresses. A Monitor programina PROM
makes program entry easy. And, even the
smallest system comes with enough RAM
memory to get started!
Both the M/KE 2 system, with the popular
8008 processor, and the 8080-based MIKE
3 rely on the same universal bus structure.
This means that accessories--like our 450
ns 4K RAM--are compatible with these
and other 8-bit CPUs. And, systems start
at under $300! For details, write for your...
FREE CATALOG!
MIKE 2
MANUAL...
This looseleaf
book includes
full information
on the MIKE 2
system, with
schematics.
Price for orders received
by November 15, 1975... $19
Includes a certificate worth $10 towards
a modular micro system, good 90 days.
(Offer valid, USA only.) After 11/15: $25.
[ modiar mics [marin rosea
Martin Research / 3336 Commercial Ave.
Northbrook, IL 60062 / (312) 498-5060
shifts each digit left automatically as a
new digit is entered! The value on the
display is also entered into an internal
CPU register, ready for the next opera-
tion. Simply by pressing the write key,
for example, the user loads 735 into
memory.
The MONITOR program also allows the
user to step through memory, one loca-
tion at a time (starting anywhere), to
check his programming. Plus, the Swap
Register Option allows use of the inter-
rupt capabilities of the microprocessor:
the MONITOR saves internal register
status upon receipt of an interrupt re-
quest; when the interrupt routine ends,
the main program continues right where
it left off.
We invite the reader to compare the pro-
grammability of the M/KE family of
microcomputers to others on the mar-
ket. Notice that some are sold, as basic
units, without any memory capacity at
all, This means they simply cannot be
programmed, until you purchase a mem-
ory board as an “accessory.” Even then,
adding RAM falls far short of @ conve-
nient, permanent MONITOR program
stored in PROM. Instead, you have to
enter your frequently-used subroutines
by hand, each and every time you turn
the power on,
EASY 1/0 INTERFACE
The MIKE family bus structure has been
designed to permit easy addition of in-
put and output ports. A hardware inter-
face to the system generally needs only
two chips—one strobe decoder, and one
latching device (for output ports) or
three-state driving device (for inputs). A
new 1/0 board can be plugged in any-
where on the bus; in fact, all the boards
in the micro could be swapped around in
any position, without affecting opera-
tion. 1/O addresses are easy to modify by
reconnecting the leads to the strobe de-
coder (full instructions are provided);
this is in marked contrast to the clumsy
input multiplexer approach sometimes
used.
POWER & HOUSING
‘The micros described to the left are com-
plete except for a cabinet of your own
design, and a power supply. The basic
micros require +5 V, 1.4 A, and —9V,
100 MA. The 4K RAM board requires
5 V, 1A. A supply providing these volt-
ages, and £12 V also, will be ready soon.
OPTIONS
‘A number of useful micro accessories are
scheduled for announcement. In addi-
tion, the M/KE 3 and MIKE 2 may be
purchased in configurations ranging from
unpopulated cards to complete systems,
For details, phone, write, or check the
reader service card.
15
memory cell which has been lost through
leakage currents. To eliminate most of the
control circuitry normally necessary to per-
form this memory refresh, the LSI-11 CPU
microcode features automatic refresh con-
trol.
When enabled by an optional jumper, the
CPU refresh control causes execution of a
microcode subroutine approximately every
1.6 milliseconds; this operation refreshes all
dynamic MOS memory in the system, not
just the memory contained on the CPU
module. While asserting a bus signal causing
all dynamic memories to cycle at the same
time, the CPU performs 64 memory
references to refresh their contents. During
the burst refresh time, external interrupts
are locked out while DMA requests are still
possible.
Maximum memory size of the 16 bit
LSI-11 is 65,536 bytes or 32,768 words.
Usually the top 4096 words of memory on
members of the PDP-11 family are reserved
for peripheral device control and data
buffers, so the nominal maximum main
memory size is 28,672 sixteen bit words.
However, the user is not required to dedicate
the entire upper 4096 word space to IO, but
may implement only what is needed. Octal
addresses 000 to 376 are usually reserved for
trap and device interrupt vector locations.
Several of these are reserved in particular for
software generated interrupts (TRAPS) as
shown in Appendix A.
Instruction Set
All operations are accomplished with one
set of instructions rather than the conven-
tional collection of memory reference in-
structions, operate/accumulator control
instructions, and IO instructions. Single and
double operand address instructions for
words or bytes are used with a wide range of
addressing modes, providing efficiency and
flexibility in programming. The various
addressing modes include sequential forward
or reverse addressing, 8-bit byte addressing,
16-bit word addressing, and stack addressing.
Using variable-length instruction formatting
allows a minimum number of words to be
used for each addressing mode.
Each processor instruction requires one
or more bus cycles. The first operation
fetches an instruction from the location
specified by the program counter (PC). If no
further operands are required for executing
the instruction, no further bus cycles are
used. If memory or an 10 device is
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P.C. boards available, No. 007 $3.00 ea,
2K RAM BOARD KIT. ALL
PARTS INCL. SOCKETS
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8008 MICROCOMP. CHIP$30.95
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17
18
referenced, however, one or more additional
bus cycles are required.
A special maintenance instruction is
included in the LSI-11 instruction set to aid
in hardware checkout. This instruction
stores the contents of five internal registers
in a specified block in main memory. A
diagnostic program may then be used to
examine the information and determine the
internal operation of the micro-level
processor.
The basic instruction set is that of the
familiar DEC PDP-11/40 without memory
mapping. Included are several operations
normally not found even in other small
PDP-11 processors, such as exclusive-or
(XOR), sign extend (SXT), or subtract one
and branch (SOB). There are also two new
instructions used to explicitly access the
processor status word (PSW). With the
optional extended arithmetic chip, full
integer multiply/divide and floating point
arithmetic are also available. The instruction
set is more comprehensive than that of the
PDP-11/05 while the execution times are a
little slower. Refer to Appendix B for a
complete list of the LSI-11 instruction set
and Appendix C for typical timings.
The branch instructions make use of the
condition codes (PSW bits 0 to 3) which are
set after execution of every arithmetic or
logical instruction. This allows more
efficient use of memory by eliminating extra
instructions and temporary storage locations
typically used to check results of various
operations. The result of every operation is
directly accessible and can be modified
under software control by using any of the
Condition Code Operator instructions. A list
of the four condition codes along with a
brief definition of each is listed in Appendix
Dd.
Software
Since the LSI-11 uses standard PDP-11
software, there is an extensive library of
programs available from DEC _ including
diagnostic programs to check out your
system after it is built. There is also a DEC
Users Society (DECUS) which makes avail-
able a complete library of various PDP-11
programs at reasonable prices. Every LSI-11
owner automatically becomes a member of
this organization.
ASCII Console
The conventional front panel lights and
switches are replaced by an ASCII console/
ODT package that operates with any stan-
dard terminal device communicating through
a serial interface at a specific device address
at any available baud rate. The functions
available are very similar to those used by
the familiar PDP-11 Octal Debugging Tech-
nique and are shown in detail in Appendix
E. These include examining and changing the
contents of memory and registers, calcula-
tion of effective addresses for relative and
indirect addressing, and the functions of
halt, single-step, continue and restart. By
examining the contents of an internal CPU
register, it is possible to determine which of
the five methods of entering the console
routines was used.
Upon entering the console routine, the
location of the next instruction to be exe-
cuted will be printed followed by @. The
console routine will then wait for one of the
14 legal command characters. Thus, the user
retains all the direct hardware control of a
conventional lights and switches front panel
and gains the ability to boot load from a
specified device in byte transfer mode.
Interfaces
The LSI-11 system includes several
standard interface modules to handle a
variety of applications. Currently both a
serial and a parallel 1O interface is available,
each as a single 8.5 inch by 5 inch (21.6 cm
by 12.7 cm) PC board. The DLV-11 handles
a single asynchronous serial line between 50
and 9600 baud, while the DRV-11 provides
a full 16-bit parallel interface complete with
two interrupt control units. The use of the
two standard interface modules makes it
very simple to connect any desired device to
the LSI-11 bus. Standard devices such as
teletypes, line printers, analog to digital
converters, etc., can be connected directly to
the interface modules with no additional
circuitry. A simple cassette recorder inter-
face can be made using the DRV-11 parallel
interface, a UART chip, and a simple speed
independent recorder interface circuit such
as that shown in Don Lancaster's article
Serial Interface, page 30, in the September
issue of BYTE. @
Are you interested in buying one?
This article has described the details of
the LSI-11 computer by Digital Equipment
Corporation. For those interested in pur-
chasing the board version of this computer,
the Southern California Computer Society is
organizing a group purchase for amateurs,
This purchase will involve an original equip-
ment manufacturer (OEM) quantity of 50 or
more machines, on a basis of cost plus 2%
minimum contribution to SCCS. For further
information contact Hal Lashlee of The
Southern California Computer Society, at
213-682-3108. SCCS is organizing quantity
purchases of other computer equipment, and
is interested in making such offerings avail-
able through other computer clubs.
APPENDIX A:
Location
999
OPA
gp
gl4
926
#24
939
934
960
ge4
199
244
APPENDIX B:
LsI-11
MNEMONIC
TRAP VECTORS
Vector
(Reserved)
Time out & other errors
Illegal & reserved instructions
BPT instructions
Ior instructions
Power Fail
EMT instructions
TRAP instructions
Console Input Device
Console Output Device
External event line interrupt
FIS option
INSTRUCTION SET
INSTRUCTION
Single Operand - General:
CLR Clear word
CLRB Clear byte
COM (B) Complement (1's)
INC (B) Increment
DEC (B) Decrement
NEG (B) Negate (2's complement)
‘TST (B) Test
Rotate & Shift:
ROR (B) Rotate right
ROL (B) Rotate left
ASR(B) Arithmetic shift right
ASL(B) Arithmetic shift left
SWAB Swap bytes
Multiple Precision:
ADC (B) Add carry
SBC (B) Subtract carry
SXT Sign extend
Processor Status (PSW) Operators:
MFPS
MTPS
Move byte from PswW
Move byte to PSW
Double Operand - General:
MOV (B) Move
CMP (B) Compare
ADD Add
SUB Subtract
Logical:
BIT(B) Bit test (logical AND)
BIC(B) Bit clear
BIS (B) Bit set (logical OR)
XOR Exclusive OR
BR
BNE
BEQ
BPL
BMI
BC
BvS
BCC
BCS
Unconditional branch
Branch if not equal to g
Branch if equal to #
Branch if plus
Branch if minus
Branch if overflow is clear
Branch if overflow is set
Branch if carry is clear
Branch if carry is set
Signed Conditional Branches:
BGE
BLT
BCT
BLE
Branch if greater or equal to 9
Branch if less than %
Branch if greater than §
Branch if less or equal to 9
Unsigned Conditional Branches:
BHI
BLOS
BRIS
BLO
Branch if higher
Branch if lower or same
Branch if higher or same
Branch if lower
Condition Code Operators:
cLC
cLV
cLZ
CLN
cece
SEC
SEV
SEZ
SEN
scc
Jump & Subroutines:
aMP
JSR
RTS
MARK
SOB
Trap & Interrupts:
EMT
TRAP
BPT
I0T
RTI
RIT
Clear C Condition Code Bit
Clear v
Clear Z
Clear N
Clear all condition code bits
Set C Condition Code Bit
Set V
Set Z
Set N
Set all condition code bits
Sump
Jump to subroutine
Return from subroutine
Mark (aid in subroutine return)
Subtract 1 & branch if not
Emulator trap
‘Trap
Breakpoint trap
Input/Output trap
Return from interrupt
Return from interrupt
Miscellaneous Instructions:
HALT
WAIT
RESET
NOP
Optional EIS:
MUL,
DIV
ASH
ASHC
Optional FIS:
FADD
FSUB
FMUL
FDIV
Halt
Wait for interrupt
Reset external bus
{no operation)
Multiply
Divide
Shift arithmetically
Arithmetic shift combined
Floating add
Floating subtract
Floating multiply
Floating divide
Continued on page 22
19
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Scientific Notation Software Package with Formatted Output
The floating point math package features 12 decimal digits with exponents from +127 to —127;
handles assigned and unassigned humbers. With it is a 5 function calculator package: +—X* &
sq. root. It includes 3 storage and 3 operating memories and will handle chain and column
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Continued from page 19
APPENDIX C:
TYPICAL INSTRUCTION TIMING
INSTRUCTION TIME (usec)
ADD R1,R2 3.5
MOV R3,RO 3.5
MOV TAG1,19 (R2) 11.55
TSTB (R3)+ 5.25
BMI TAG2 3.5
SSR PC, 2(R2) 8.95
oMP (R4) 4.2
RTT 1g.5
Optional EIS & FIS Instructions:
MUL 24 - 64
FADD 42.1
FMUL 52.2 - 93.7
FDIV 151 - 232
APPENDIX E:
ASCII CONSOLE/ODT COMMANDS
Command Function
<cR>
<LF>
location.
Up-arrow Open previous location.
Back-arrow
COMMENTS:
Register addressing
Relative & index addressing
Auto-indexed
Conditional branch
Subroutine call
Jump indirect
Return from interrupt
APPENDIX D:
PSW CONDITION CODES
Multiply
Ploating add
. CODE ——-PSW BIT
Floating mult
Floating divide N a
z 2
v 1
c g
Close opened location and accept next command.
Close current location; open next sequential
Take contents of opened location as a
xelative address, and open that location.
@ Take contents of opened location as
absolute address and open that location.
x/ Open word at location r.
/ Reopen the last location.
$n/ or Rn/
Open general register n(f-7) or S (PSW).
x;G or xG Go to location r and start program
nL Execute bootstrap loader using n as device
CSR. Console device is 177562.
iP or P Proceed with program execution.
RUBOUT <DEL>
is a backslash (\).
22
Erases previous numeric character. Response
CONDITION WHEN SET = 1
If result were negative
If result were zero
If operation resulted in
an arithmetic overflow
If operation resulted in
a carry from the msb (most
significant bit) or a 1
was shifted from the 1sb
(least significant bit)
Continued on page 24
Go Computer Now!
Why not?
FROM $860 TO $11,300 SPHERE CAN'T BE BEAT!
SPHERE starts with a CPU using a Motorola 6800 microprocessor, a Real-Time Clock, 4K of dynamic memory, 1K of
PROM software. The CRT Board generates 16 lines by 32 characters of ASCII on a television or video monitor. Keyboard is
complete with numeric and cursor editing keypads. From here, hardware can be expanded to your hearts desire with extra
memory boards (up to 64K), serial communications interface, cassette interface, Modem, digital I/O (as many as you need).
Floppy Disk memory (up to 4 disks), 8 computer terminals, line printer etc...all from one M6800 chip.
With a SPHERE Computer, stand-alone development is just the beginning, you can configure your system to handle
your problem solving/record keeping needs. All SPHERE Computer Systems come complete with useable software languages.
‘Available are "PDS" 1K Basic, or extended Basic Compiler. When computer is turned on, it immediately goes into a comm-
and mode, so that you can instantly start programming. PDS" contains a mini-assembler, editor, debugger, and utility comm-
and set in 1K of PROM. Also available is a 1K subset of Basic. Our extended Basic compiler is complete with string, matrix,
and file functions, and requires 12K of memory. With this software you can perform your applications whether it be account-
ing, home management, education, security monitoring, research, business, etc. Why not invent your own application? For
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computer is ready and comes complete with operator manuals sufficient for first-time computer users. Contact us today for
more information.
KIT ASM KIT ASM
any ee ONE-CARD COMPUTER: Motorola 6800 microprocessor, 4KRAM, —_g999 gy49qr_ SPHERE2: Includes all features of SPHERE 1, plus serial communica-
512 bytes EPROM (containing a Program Development System), a tions and audio cassette or MODEM interlace.
REAL-TIME CLOCK, 16 LINES OF DIGITAL VO, hard wired ROM
Monitor, and a serial type interface. This is the 100-quantity price, 4459959 SPHERE 3: Includes all the features of SPHERE 2, plus memory
extended to the hobby user for a limited time on a single unit. totaling 20k which is sufficient to run full extended BASIC Language.
522622 CPU BOARD: Motorola 6800 microprocessor, 4K RAM. IKEPROM — gigg 7995+ SPHERE 4: Includes all of the features of SPHERE 3, except the
{containing an EDITOR, ASSEMBLER, DEBUGGER, COMMAND cassette has been replaced by an IBM-compatable Dual Floppy Disk
LANGUAGE, CASSETTE LOADER, DUMPER, UTILITIES), and a REAL- System. This system includes a Disk-operating System and BASIC
TIME CLOCK. Language and a 65 LPM line printer.
360 1400" SPHERE 1: Includes the CPU BOARD described above, plus 512 yarigys)_-« OTHER SPHERE PRODUCTS: Light pen option; {ull color and 8/)W
character video with full ASCII keyboard and numericcursor video graphics system: low cost Dual Floppy Disk System; and full
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“This ASSEMBLED SPHERE System includes the complete chassis, and video monitor as pictured below.
ON
WW
SPHERE
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791 South 500 West Dept. 129 (801) 292-8466
Bountiful, Utah 84010
23
24
Continued from page 22
BUS.
BUS
TIMEOUT
DMA
JUMPER
SELECTABLE
OPTIONS
MACROCODE
MICROCODE
A collection of parallel data paths
and power lines used to
interconnect the various elements
of the system, including the
central processor, memory, and
all peripherals.
Bus timeouts or bus errors occur
whenever the controlling device
on the bus (the bus Master) does
not receive a response from the
addressed device (the Slave)
within a certain length of time. In
general, these are caused by
attempts to reference
non-existent memory or
peripheral devices. Bus error traps
cause processor traps through the
trap vector address 4,
Direct Memory Access. For high
speed devices, memory may be
accessed directly through the bus
without the use of program
controlled data transfers.
The CPU module contains
locations for six wire jumpers to
contro! the various operating
options as follows:
1, Two wires select which of the
four possible power-up options is
desired. These are normally set to
restart through vector location 24
{so the LSI-11 acts as a standard
PDP-11).
2. One wire jumper enables the
external event (or real-time clock)
interrupt feature when inserted.
3. One wire jumper enables the
automatic dynamic memory
refresh feature when inserted,
4, Two wire jumpers determine
the addressing of the 4K RAM
memory located physically on the
CPU module.
Each wire jumper consists of a
short length of bare copper wire
soldered between two designated
holes in the PC board.
The instruction set which the
programmer sees and actually uses
to implement his program, such as
the PDP-11 instruction set in this
case,
The low level instruction set used
in a microprogrammed processor
to “emulate,” or execute, the
macrocode. Microcode is more
primitive in function, but
executes at a higher speed than
the macrocode.
Pc
POWER-UP
SEQUENCE
OPTION
Oo
1
z
3
STACK
TRAP
VECTOR
VOLATILE
MEMORY
Program Counter. A register
which contains the address of the
next instruction to be executed.
Two wire jumpers on the CPU
module select one of the four
Possible power-up modes:
POWER-UP
PC at 24, PSW at 26, or HALT
ODT — ASCII Console
PC = 173000, or HALT
Special processor microcode
The power-up sequence is
initiated upon supplying power to
the processor module or on
restoration of power after a
temporary power fail has
occurred.
Processor Status Word, Contains
information on the current status
of the processor including the
priority mask (bit 7) and the
condition codes (bits 0 to 3).
An area of memory set aside by
the programmer for temporary
storage or subroutine/interrupt
sevice linkage. The stack uses the
“Last In — First Out" concept;
thus various items may be added
to a stack in sequential order and
retrieved or deleted from the
stack in reverse order. Stack starts
at the highest location reserved
for it and expands linearly
downward. In the LSI-11, register
6 is reserved as the hardware stack
pointer and must be initialized by
the software. However, registers 0
to 5 may be used for various
program defined stacks as needed,
Software generated interrupt.
A unique address which points to
a reserved set of locations (2
words) for interrupt or error
handling. The first word contains
the starting address of @ service
routine (a new PC) while the
second holds the new PSW to be
used by the service routine.
Volatile memory, such as RAM,
will not retain useful information
without power applied
continuously. Non-volatile
memory, such as core or ROM,
will always retain its inform:
with or without power applied,
Memory Mania?
4K — $215!
SK — $402!
122K — $562!
I6K — $696!
THE MORE THE MEMORY....THE MERRIER!
The SPHERE Memory board. Is designed to hold 16K of memory on one board.
2107A-8 memory chips are used on this board and are designed in 4K increments to
allow choice of 4, 8, 12, or 16K. Each memory chip is socketed and is delivered to you
completely assembled and tested. The PC memory board connects to the CPU board
tri-state buffered bus cables. The memory locations are strap selectable as to order of
addressing. Those memory mania purchasers of 12 or 16K who have, or who buy, any
SPHERE Computer System will get absolutely free the SPHERE extended BASIC com-
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ITS ALL DYNAMIC MEMORY!
I SPHERE CORPORATION
Dept. 130
I 791 South 600 West
I Bountiful, Utah 84010
Dear SPHERE:
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[| Print name:
Address:
=PHERE
CORPORATION
791 South 500 West Dept. 130 (801) 292-8466
Bountiful, Utah 84010
I City and State:
Zip Code: Phone:
a
26
RITTEN 0 NA
et There Be
Photo 1: The ease of removing just one dot from a
full field display depends upon the display size.
The author's X-Y display has an adjustable size
control which was used in preparing this picture.
Light Pens
Sumner S. Loomis
Loomis Laboratories
Route 1 Box 131A
Prairie Point MS 39353
soneeqepene
Photo 2: The light pen can be used in an “erase” mode by filling the screen with “on”
dots then selectively removing dots with the light pen. The titles added to this picture
(and all the pictures in this article) were created with a separate character generator
which is not described.
26
With only a few components and a few
hours of construction you can add a versatile
light pen to the oscilloscope graphics inter-
face which has been described in the
October 1975 issue of BYTE, page 70 ff.
By holding the light pen to the face of
the cathode ray tube (CRT), a point may be
added or removed. This eliminates the
awkward and time consuming effort
required when using a program or manual
switches to change the dots on the screen.
The resolution and capability of the light
pen are dependent on two characteristics of
the CRT. The brightness and the size of the
display tube will determine how easily you
may add or remove one dot. An idea of the
effect of display size may be had from photo
1, The word Test was written twice ona 12
inch (30.5 cm) black and white TV picture
tube configured as an XY display like an
oscilloscope. The top word was written with
the display adjusted to an 8 inch (20.3 cm)
size, and the lower word was written witha
4 inch (10.2 cm) display. Each letter was
written with only one stroke of the light pen
without touch up or corrections. With some
practice, and possibly several passes, one dot
may be added or removed if the display
measures 8 inches (20.3 cm) or more.
Further improvements to the pen are
required with smaller display tubes. An
advanced circuit that greatly improves the
capability of the pen with small displays is
also described in this article.
The light pen can erase or draw
depending on the setting of a switch.
Examples of the two actions may be seen in
photos 2 and 3. If the oscilloscope interface
is adjusted for a high repetition rate, some
smearing or carry over into the neighboring
dot positions occurs. The author’s system
has a front panel control permitting ten
repetition rates. A small improvement in
resolution can be noted at the lower writing
rates, as shown in photo 2. A frame consists
of 64 by 64 dots.
Theory of Operation
The light pen operates on the principle
that brightness is quite intense during the
actual interval that a particular dot is being
written by the CRT’s electron beam.
Although phosphor will continue to emit
light for some time, the brightness decays in
an exponential manner after the writing
beam has moved on to the next dot.
Figure 1 illustrates the simple light pen
circuit. With proper adjustment of the sensi-
tivity control (and possibly the brightness
control), the photocell in the tip of the light
pen will sense the moment in time when a
dot is written at the particular location of
the light pen. At this instant, the photocell
will conduct, biasing the PNP transistor
which causes a short pulse to be conducted
through capacitor C1 to the base of the NPN
transistor Q2. If the pulse is greater than .6
V, this transistor will be driven into satura-
tion, and the light pen output will fall to .3
V. This output line is the connected to pin 5
of the oscilloscope graphics unit which
writes a 1 or a O bit (dot or no dot) at
precisely the instant that the dot position
touched by the pen was addressed.
The above procedure works quite well if
the dot to be changed is illuminated at the
time. With proper adjustment of the sensi-
tivity control, we can usually use an illum-
inated dot just above the point of action (it
must precede the dot in scan sequence) to
create a new dot in the next space. This
action of extending a line can be quite useful
for drawing bar graphs on the CRT. This
mode of entry is possible because screen
persistence allows the light pulse to be
carried over into two or three subsequent
dot positions depending on the frame speed.
How can the photocell sense the dot’s
position if there is not any illumination to
trigger it? This is accomplished by the flood
circuit which is shown in figure 2. This
circuit overrides the normal Z-axis control
and floods the screen with light by feeding a
logical one signal to the Z axis of the display
‘unit. With this arrangement the pen is placed
at the required dot position, the footswitch
is actuated to flood the screen with light,
and the photocell is energized when the
Bat
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FREE-HAND WRITING
Photo 3: The light pen can be used in an “enhance” mode by using a footswitch control
to flood the screen momentarily when the light pen is in position.
PC RI
SENSITIVITY MFG __PHOTOCELL|CONTROL
Tl H-35 IM
1 H-38 2M
1 L-63 5K
CLAIRE 903 20K
LIGHT-PEN
OuTPUT
LIGHT PEN PC-1
Figure 1: The simple version of the light pen can be constructed according to this
schematic, All resistors 4 W.
RI
FROM DDU CARD coal To OSCILLOSCOPE
Z OUTPUT Z INPUT
R2
ths
-av R3 6
or 390-22K
T a
Or
FOOT SWITCH SI
Figure 2: The foot switch control used to flood the screen for “enhance” mode
operation is given in this circuit which modifies the Z-axis signal to the oscilloscope
driver.
27
28
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Ole 20pF
CHAR GEN
10 PINS WRITE S3
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SHOT
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LIGHT PEN PC-I
mn
Figure 3: By adding a pair of oneshots to the circuit, the ability to draw pictures is improved through a short
data lockout period which avoids smearing.
writing beam reaches that particular dot
position. Releasing the footswitch removes
the flood and allows the data to be
examined.
The circuits just described will probably
suffice if you wish to use the light pen only
for occasional correction of data. If you plan
extensive and detailed work, such as
cartooning or statistical data entry, a modifi-
cation of the circuit will allow you to tailor
the light pen’s response to your own particu-
lar needs and system speed. The circuit
shown in figure 3 is similar to the one shown
in figure 1. However, it includes two oneshot
multivibrators (contained in one CMOS
DIP). The first one produces a constant
amplitude pulse of approximately 200 nsec
duration which is sufficient to bring about
the storage of a 1 or 0 bit in most versions of
the 2102 memory (ICs 11 to 14 in the
oscilloscope graphics interface). The second
one delays the generation of another write
command for .25 sec, giving the operator
sufficient time to withdraw the pen from the
screen or move to a new location, before a
double or multiple dot can be drawn, Once
the two pulses have been timed in accor-
dance with a given system speed and the
operator’s writing speed, it becomes very
easy to draw detailed images with the light
pen.
In figure 3 resistor R4 and capacitor C1
control the length of the write pulse, and
resistor RS and capacitor C2 control the
wait time. For the 4528 CMOS oneshot, the
time of the pulse (T) measured in micro-
seconds is a function of resistance (R) and
capacitance (C) measured in ohms and
microfarads, respectively, as follows:
T=2,5*R*C ** 85;
where a single asterisk denotes multiplica-
tion, and a double asterisk exponentiation.
The circuit shown in figure 3 also
includes a switch and connections for using
the light pen with the author's text display
and editing system, Exact details for this
connection are not given here, as they will
differ with the type and construction of the
text display system. | found, however, that
the shift register type memories commonly
used in these systems require a much longer
write pulse than is necessary for the 2102
memories. It was also desired to eliminate
the holdoff circuit (second oneshot) for this
application. These changes are accomplished
with switch S1 and resistors R9 and RS. If
these features are not desired, it is recom-
mended that R9 be replaced by a wire, R4
changed to 4.7 kQ and C1 to 20 pF.
Construction
As is shown in the table accompanying
figure 1, several different types of photocells
are suitable for use in the light pen. The
Texas Instrument (Tl) type H-35 or H-38 is
avery small device with a built in lens. These
were originally designed for use in punched
tape and card readers, thus the small size.
Their size, sensitivity, and restricted field of
view make them ideal for this application.
The high impedance of these devices, how-
ever, makes them somewhat slow for this
application, particularly at low brightness
levels. The slow response time limits their
use at the faster scan rates, and complicates
the smearing mentioned earlier. Another
device, the L-63 type which is available from
Radio Shack (276-140 infared detector), was
found to be considerably faster. Being a
much larger device, however, it has a larger
field of view, and much of its speed advan-
tage is lost to optical smearing. Models of
both photocell types were built and tested
by me, with only slight preference for the
H-35, With some careful masking, and
possibly the addition of a small, short focal
length lens (e.g., Edmund Scientific number
12050 cylinder lens, or a small drop of clear
epoxy), this photocell will probably perform
better than the H-35 for this application.
The Claire types 903 and 903-L were tried
with only fair results.
Any ball-point pen or felt-tipped marker
can be reworked to make a housing for your
light pen. Take a tour of the local stationery
store to find likely candidates. The L-63
photocell was found to fit nicely into the
end of a Graphi-100 marker pen which can
easily be disassembled with diagonal cutters.
An example of the construction with the
L-63 is shown in photo 4, and the H-35
assembly is shown in photo 5.
Secure the photocell in place with epoxy
adhesive after attaching the shielded cable.
The cable can also be secured against damage
from pulling by filling the entire pen with
silicone rubber adhesive or ordinary house-
hold bathtub caulk. It is wise to keep the
cable short, especially with the H-35 or H-38
photocells, to obtain maximum possible
response speed. | used an 18 inch (45.7 cm)
long miniature coaxial cable leading to a
miniature phone plug.
If you are using the simple circuit of
figure 1, the parts can be assembled on a
small turret terminal board available at most
electronic supply houses. This assembly is
shown in photo 6. The circuit of figure 3 can
be assembled in the same manner with the
addition of a 16 pin DIP socket. R4, R5, C1
and C2 should be mounted in such a manner
that they can be changed easily (Cambion
601-1512 component clips are useful here).
<a
\S
Photo 4: This shows a pen based on the TI type L-63 photocell, built using a marking
pen case,
Photo 5: This picture shows an assembled light pen using a TI type H-35 (or H-38)
photocell with a standard ballpoint pen housing.
Ess
Photo 6: This photo illustrates how the circuit of figure 1 can be assembled using a small
turret terminal board. The transistors and R5 are mounted out of sight on the rear side
of the board,
29
IMPROVED FREE-HAND WRITING
Photo 7: Using the improved circuit of figure 3 reduces much of the over-writing of
multiple dots which occurred using the original circuit of figure 1, This is an enhance
mode picture,
Photo 8: This illustrates a cartoon drawn using the erase mode of operation with the
improved circuit of figure 3.
30
The sensitivity control may be conveniently
mounted on the front panel.
The operation of the light pen requires
control of the inputs to the oscilloscope
graphics unit. | have found that one of the
most convenient ways in my system is
through a set of manual data switches. This
type of input was illustrated as a test fixture
for the oscilloscope graphics interface in
figure 5 on page 75 of the October 1975
issue of BYTE. In my system, these data
input switches are shared with a Mark-8
minicomputer front panel by means of an 8
pole double throw toggle switch. It is also
possible to set up input codes to the
oscilloscope graphics unit using software in
the microcomputer system which drives it.
In order to enter data with the light pen,
a deposit switch is pressed whenever the pen
is in the proper position for data entry. The
deposit switch should be mounted in a
convenient location near the display tube
and light pen. In my system the light pen
deposit switch was mounted next to the
original deposit switch of the Mark-8 com-
puter.
Using The Light Pen
To illustrate the use of the light pen, we
will cover the procedure necessary to draw a
simple figure on the screen in the erase mode
using manual controls. Set the switch
register to 1000 0110 binary (turn scan on)
and depress the deposit switch. This should
produce random dots on the screen. Set the
switch register for 1000 0010 binary (set Z
on) and depress the deposit switch again.
The screen will show a full field of dots. (If
the Z axis polarity of your display tube is
reversed, you will have to use the “‘set Z off”
command (1000 0011 binary) to illuminate
the screen.) Set the switch register for 1000
0010 (set Z on), but do not activate the
deposit switch. Now bring the light pen in
contact with the display CRT, and note that
the dot or dots within its field of view are
erased. To erase the entire screen and start
over, simply press the deposit switch and
repeat the above procedure.
To write in the enhance mode (screen
dark, writing illuminated dots), reverse the
above procedure by wiping the screen clean
with the “set Z off” command (while the
scan is on), and after setting the switch
register to “set Z on” without the deposit
switch, proceed to write dots with the light
pen. In this mode, the flood foot switch
must be periodically activated to provide the
required illumination. Examples of the light
pen’s drawing capability can be seen in
photos 7 and 8. #
Horror Story
Not too long ago, researchers at Stanford
Medical Center in California were horrified
to discover that several years of data that
were stored on magnetic tape had
disappeared. The tapes hadn’t disappeared,
just the data. The discovery was made when
they attempted to retrieve some of the data
for analysis, but found only “garbage”
recorded on the tapes. Even more disturbing
was the fact that these tapes were supposed
to be ultra reliable. They had been especially
developed for storage of important research
data and used a fully redundant recording
technique for improved reliability.
Fully redundant recording is a storage
technique in which each data bit is recorded
in two different locations. In this case,
DECtape™M was being used. This is tape
that is 3/4ths of an inch wide and has six
parallel data recording channels or paths.
The data recorded in the three channels on
one side of the tape is duplicated in the
three channels on the other side. Thus, the
tapes have half the data capacity that they
could have, but their reliability is signifi-
cantly improved.
It should be noted that there are a
number of other possible redundant storage
techniques in use for improving reliability.
For instance, ‘‘triply redundant recording”
replicates each bit three times in three
separate locations. Alternatively, depending
on the allowable bit-patterns that may be
used to store data, ‘partial redundancy”
may be used. In this technique, a
computation is performed on the explicit
bit-pattern of each datum. The computation
result requires fewer bits than the original
datum, but may be used to either replicate
the original datum (thereby recovering it, if
necessary) or to at least verify the
authenticity of the original datum. These are
referred to as “error-correcting codes” and
“‘error-checking codes,” and form an
on-going area of applied-mathematics
research. In either case, partial redundancy is
important in that it improves reliability, but
requires less additional storage than
full- or triple-redundancy.
First, the researchers thought (prayed)
that their tape decks were malfunctioning.
Not so. Diagnostic checks were made and the
tape equipment was working properly. Next,
the tapes were examined. Nothing was
wrong with them, physically, and in fact,
new data could be recorded on them and
retrieved without difficulty. They asked
others around the Medical Center if they had
encountered similar problems (there are
about 50 computers at the Stanford Medical
Center). None had. Then they looked for
environmental causes, but there appeared to
be none. The temperature and humidity
recorders, common to biomedical research
fac es, indicated no significant
fluctuations. There had been no fires, no
chemical accidents, and there was no x-ray
or high power electronics gear in use nearby,
The tapes had been in their individual boxes,
just like the tapes for all of the other
computer facilities in the Medical Center,
and these boxes had been neatly stored on
the bottom shelves of a cabinet, well out of
the way of possible harm. It was a most
frustrating puzzle.
Finally, however, the mystery was solved.
It seems that the janitor had made his
biannual floor polishing rounds, using a
heavy duty rotary floor polisher. The
magnetic radiation from its massive motor,
in proximity to the low shelved tapes, had
raised havoc with the bit patterns that had
been recorded on the tapes.
The researchers now store their tapes on
the top shelves, =
Jim C. Warren Jr.
Star Route Box 121
Redwood City CA 94062
31
LIFE Line 4
Integrating graphics control commands
Car! Helmers
32
In LIFE Line 3, the design of the
DECODE routine of the LIFE program was
presented. DECODE is designed as a table
driven mechanism for selecting one of
several subroutines which carry out the
functions of the LIFE program’s KEY-
BOARD_INTERPRETER. However if you
examine table 1 of LIFE Line 3 (see p. 51 of
BYTE #4), you will note one conspicuous
and intentional lack: There are no routines
which process the interactive graphics com-
mands required to set up LIFE patterns on
the scope display. Yet in LIFE Line 1,
several special purpose keys were introduced
as manual inputs for cursor motion control
and data definition purposes. Where is the
missing part of the program which interfaces
these keys? What are the hardware implica-
tions of requiring a special keyboard?
Answers to these questions are the major
concern of LIFE Line 4. Integrating the
graphics control commands is a combined
hardware and software topic. The software is
that of the DEFAULT routine that inter-
prets several keyboard inputs not handled by
DECODE; the hardware consists of the
design of a special keyboard interface to
automatically switch between an ASCII key-
board’s 7-bit parallel output code and the
LIFE graphics con
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