US4905182

United States Patent (19) 11 45 Fitch et al. (54) SELF-CONFIGURING MEMORY MANAGEMENT SYSTEM WITH ON CARD CRCUTRY FOR NON-CONTENTIOUS ALLOCATION OF RESERVED MEMORY SPACE AMONG EXPANSON CARDS (75) Inventors: Jonathan Fitch, Cupertino; Ronald Hochsprung, Saratoga, both of Calif. (73) Assignee: Apple Computer, Inc., Cupertino, Calif. (21) Appl. No.: 25,500 Patent Number: Date of Patent: 4,905,182 Feb. 27, 1990 OTHER PUBLICATIONS Nu Machine Nu Bus Specification; Texas Instruments; Publication No. TI-2242825-0001; 1983. Texas Instruments; Explorer, Publication No. 2537171-0001; Dec., 1985. NuBus-A Simple 32 Bit Backplane Bus P1196 Specifi cation Draft 2.0, (IEEE), Dec. 15th, 1986, This Docu ment is a Draft Specification of the P1196 Working Group of the Microprocessors Standards Committee of IEEE, (pp. 1-60). Primary Examiner-Raulfe B. Zache Assistant Examiner-Malcolm G. Andrews Attorney, Agent, or Firm-Blakely, Sokoloff, Taylor & Zafiman 22) Filed: Mar. 13, 1987 (51) Int. Cl'....................... G06F 13/14; G06F 13/36 (52) U.S. C. ................................. 364/900; 364/935.4; 364/935.44; 364/964.4 (58) Field of Search ........................ 364/200, 900, 421 (56) References Cited U.S. PATENT DOCUMENTS 3,675,083 7/1972. White .................................. 317/101 3,710,324 1/1973 Cohen et al. ......... ... 364/200 3,993,981 1/1976 Cassarino, Jr. et al. ... 364/200 4,000,485 12/1976 Barlow et al. ....... ... 364/200 4,250,563 2/1981 Struger ............. ... 364/900 4,633,402 12/1986 Flinchbaugh ....................... 364/421 FOREIGN PATENT DOCUMENTS 1380776 1/1975 United Kingdom. 2060961 5/1981 United Kingdom . 2101370 1/1983 United Kingdom . 2103397 2/1983 United Kingdom . (57) ABSTRACT A printed circuit board card adapted to fit into a slot and make electrical connections with cooperating ter minals in the slot, the slot being disposed on the main circuit board of a personal computer system, the main circuit board including a CPU, memory, a 32-bit ad dress bus with control signals associated therewith, and input/output circuitry. The slot is coupled to the 32-bit address bus, being substantially a NUBUS bus, and the slot includes distinct identification line means which provide the slot with an identification number (distinct number) in the computer system. The card includes a decoder means which is coupled to the slot to receive the identification number; the decoder means has nem ory reservation means which causes 256 megabytes of memory space to be reserved for the card in the slot, such that, where the slot number is X, the 256 mega bytes of reserved memory space begins at location SX000 0000 and ends at locations SXFFFFFFF. 10 Claims, 7 Drawing Sheets U.S. Patent Feb. 27, 1990 Sheet 1 of 7 4,905,182 5 . ... CPU 3. 3. 7 IAO NTERFACE ( 9 CPU MOTHER BOARD MEMORY 25 U.S. Patent Feb. 27, 1990 Sheet 2 of 7 4,905,182 PHYSICAL ADDRESS MEMORY SPACE $ FFFF SMALL SPACES FFFF SFOOO OOOO $E SUP…