0002 0154 Imager Board Model 800 Rev B1

IMAGER BOARD Model800 RasterOps Corporation 0002-0154 March 23, 1990 Revision Bl Introduction The Imager is a dedicated longword BITBLT-Fll.L engine optimized for the NuBus. The Imager has 8 modes of operation: Fll.L-CONSTANT, Fll.L-PATIERN, PRAM-FILL, BITBLT, INVERT-FILL, INVERT-PATTERN, INVERT-PRAM-FILL, and INVERT-BITBLT. In addition the programmer can enable BUS-LOCKING to prevent other NuBus masters from interrupting an operation.This function combined with automatic Block Transfer enable the Imager to fill data at a peak rate of 9 million pixels-per-second, and blit data at a peak rate of 4.5 million pixels-per second on a fast block mode video board The Imager has been designed for maximum performance by minimizing the amount of software overhead required to initiate an operation and by a novel use of a large pixel Cache (SRAM). A flexible architecture has been created which allows any 32 bit address within the Macintosh computer to be accessed for each operation. A programmable translation memory (TRAM) is placed discontinuous data the motherboard to the video board. This function is required for the Macintosh Ilci and future machines with non-contiguous main memory. A large pixmap memory (PRAM) is included to allow offscreen pixmaps to reside locally and to be moved at high speed to the video cards. The Imager can support up to two Block-Mode capable videocards and an unlimited number of non-Block-Mode video cards. The Imager is not limited to just video cards, but can be used with memory cards as well. The Imager resides in its own NuBus slot and has a power consumption of 2 Amp. Reference Documents The following is a list of related documents for the Imager product: Schematic 0002-0149 Assembly Drawing 0002-0150 PC Fab drawing/Artwork 0002-0151 Board List of Materials 0002-0152 Top Assembly LM 800 Manual 0700-0044 Block Diagram -AD(31:0) N u ADDRESS GENERATOR CHIP B e.,-1('·,/1 :·· '" ~- u ', 1 s PIXMAP MEMORY I N T E 4-16 MEGS R F A c E PfdF1r~c DATA GENERATOR CHIP BK BYTE PIXB..CACHE 5 RA ftA, ADD .___ DATA L/ . ;~ j( '/ \ 4,o"·lle, ,.., /lr..-1 -.1rur. . 1. fr. ·. ,)( L iy.'.J < BUSCONTRa...SEQUENCERS Imager Register Address Map ' ~ /t I ID REGISTER FSFF Fxxx ·., (j{)C10 C;oO / ,,.--....._ ,,.--....._ ,,. FSFF C020 k>/_!,J ,,.x.' FSFFC01C w/ /J if '·{ FSFF C018 t /\- "l.Y ?,F r:ff'('. 4- r.\-: ·: PRAM POINTER~. ,, ~r ; 11 , c 1 r ··; BLOCK COMPARE #2 Fct· ,FE er f(t.' r'. .· .. J FSFF C014 FSFF C010 ;J FSFFCOOC I· p FSFF COOS COLJNTLENGTH • ·i FFir''' .~·:·-i.-:1 1/ 5 7. FSFF C004 tu(o r FSFF COOO /) 3 ·1. SEMAPHORE POINTER PIXEL CACHE SRAM 8K BYTES f./-f .~~ ' ·f>'l\ !! / 1 ·./: , ' ' SOURCE POINTER 5ii: ' ' FSFF AOOO FSFF9FFC f /,•"'' .. · ·' cJ /DD'{)r.>Od DESTINATION POINTER ~,~,;' ?: , ·r TRANSLATION TRAM 1K BYTES r- :/- SAAM POINTER FSFFA3FC FSFF 8000 ,,~r. ~-ft', , 1, , , .1: ,' Pixel Cache SRAM The Pixel Cache SRAM (…