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ApplPowerOn.A

ApplPowerOn.A

NuBus · A
FilenameApplPowerOn.a
Size0.02 MB
Subsection apple / Zorro_Coax-Twinax_Card / diag
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Contents
;===================================================================================
;
; File:		ApplPowerOn.a
;
; Function:	Power on test for 8344 related circuitry 
;   {
;	Test 8344 RIC register;
;	Test 8344 Program Counter;
;	Test 8344 Data RAM locations 0x3E00-0x3FFF with pattern FF then 00;
;	Test 8344 Instruction memory with patterns FF then 00;
;	Load 8344 test program;
;	bcpTestState = IDLE;
;	bcpTestErr = ER.RAM | ER.LOOP | ER.REG;
;	Fill 0x3E10 to 0x3EFF with ripple pattern for TRx loopback test;
;	Start 8344 test;
;	Wait till bcpTestState != IDLE or timeout;
;   }
;
; Input:	None
;
; Output:	None
;
; Update:	#VendPowerupMask ANDed to word in card location #TstStatus if no error
;		($134) = 32 bit failure code if status indicates failure
;
; History:	12/03/87: initial version
; M001 01/15/88 always set 'Fast Write' & 'Latched Read' when testing RIC
; 	3/7/88   WHJW: moved all interrupt routines into this module
;
;===================================================================================

	INCLUDE	'CommDeclr.h'
	INCLUDE 'Application.h'
	ENTRY	bcpCodes
	
VendorPowerUp:	PROC	EXPORT		; WHJW: mod to facilitate modular structure
	or.w	#$0700, SR		; disable interrupts 0-7
	jsr	zt_RIC			; test 8344 RIC
	bne	zt_err			; skip if error
	
	jsr	zt_PC			; test 8344 program counter
	bne	zt_err			; skip if error
	
	move.l	#bcpComm, A2		; point to location 3E00 of data memory
	move.l	#bcpDMEnd, A3		; ending location
	jsr	zt_RAM			; test interface area (0x3E00 - 0x3FFF)
	bne	zt_err			; skip if error
	
	jsr	zt_IMem			; test 8344 instruction memory
	bne.s	zt_err			; skip if error
	
	lea	bcpCodes, A3		; A3 = address of 8344 code records
	jsr	load_BCP		; load test code to 8344
	bne.s	zt_err			; skip if error
		
;	movea.l	#bcp_readback, A3  	; A3 = address of buf to store readback
;	jsr	read_BCP	   	; read 8344 instructions back

;---------------------------------------
; - Set BCP Test State to IDLE, error flag indicates all error bits set
; - Start 8344 execution
;---------------------------------------

	movea.l	#bcpRIC, A1	   	; address of 8344 RIC
	moveq	#RIC_DRAM, D0		; select Data memory
	move.b	D0, (A1)	   	;
	moveq	#bcpIDLE, D1	   	; set BCP test state = IDLE
	movea.l	#bcpTestState, A2  	;
	move.b	D1, (A2)	   	;
				
	moveq	#bcpError, D1		; init bcpTestErr with all error bits set
	movea.l	#bcpTestErr, A2		;
	move.b	D1, (A2)		;

	moveq	#RIC_PC_LO, D0		; select 8344 PC 
	move.b	D0, (A1)		;
	moveq	#BT_POR, D1		; 8344 POR test entry
	move.b	D1, (A2)		;
	moveq	#RIC_PC_HI, D0		; 
	move.b	D0, (A1)		;
	move.b	#00, (A2)		;
				
	moveq	#RIC_START, D0		; start 8344 execution
	move.b	D0, (A1)		;
				
;---------------------------------------
; - Wait for 8344 finish its testing
;---------------------------------------

	move.l	#WaitBCPDone, D2  	; loop count waiting for 8344 finish testing
@30:
	moveq	#RIC_DRAM_RUN, D0	; select Data memory
	move.b	D0, (A1)	  	;
	movea.l	#bcpTestState, A2 	;
	cmp.b	#bcpDONE, (A2)	 	; check if 8344 finish testing
	beq.s	zt_rtn		 	; exit loop if yes
	subq.l	#1, D2			; decrement count
	bne.s	@30			; keep checking till timeout
	
;
; - Check if 8344 test error
;

	moveq	#RIC_DRAM, D0		; select Data memory & stop 8344
	move.b	D0, (A1)	   	;
	movea.l	#bcpTestErr, A2		; test error location
	cmp.b	#0, (A2)		; get 8344 test error indicator
	bne.s	zt_err			; skip if error
	
;---------------------------------------
; - No error exit
;---------------------------------------

zt_rtn:
	movea.l	#TstStatus, A0	;address in low board memory
	and.w	#VendPowerupMask, (A0)	; passed! 

;---------------------------------------
; -  exit
;---------------------------------------

zt_err:
	rts


	EJECT

;===================================================================================
;
; Name:		Test RIC
;
; Function:	Test 8344 Remote Interface Configuration register 
;
; Input:	None
;
; Output:	Z flag set   => no error
;		Z flag clear => error (D1 = data written; D2 = data read back)
;
; Update:	None
;
; History:	12/03/87: initial version
; M001 01/15/88 always set 'Fast Write' & 'Latched Read' when testing RIC
;
;===================================================================================

zt_RIC:	
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	moveq	#$30, D1	; write 30				;;;M001
	move.b	D1, (A1)	; 
	move.b	(A1), D2	; read back
	andi.b	#$7F, D2	; MSB is read only
	cmp.b	D1, D2		; compare
	bne.s	@90		; jump if error
				
	moveq	#$31, D1	; write 31				;;;M001
	move.b	D1, (A1)	;
	move.b	(A1), D2	; read back
	andi.b	#$7F, D2	;
	cmp.b	D1, D2		; compare
	bne.s	@90		; jump if error
				
	moveq	#$32, D1	; write 32				;;;M001
	move.b	D1, (A1)	;
	move.b	(A1), D2	; read back
	andi.b	#$7F, D2	;
	cmp.b	D1, D2		; compare
	bne.s	@90		; jump if error
				
	moveq	#$33, D1	; write 33				;;;M001
	move.b	D1, (A1)	; 
	move.b	(A1), D2	; read back
	andi.b	#$7F, D2	;
	cmp.b	D1, D2		; compare
@90:
	rts
	
	EJECT

;===================================================================================
;
; Name:		zt_PC
;
; Function:	Test 8344 Program Counter
;
; Input:	None
;
; Output:	Z flag set   => no error
;		Z flag clear => error (D1 = data written; D2 = data read back;
;				       A2 = failed address)
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================
				
zt_PC:
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	moveq	#RIC_PC_LO, D0	; select PC low
	move.b	D0, (A1)	;
	movea.l	#bcpPC, A2	; dummy address for writing to 8344 PC

	move.b	#$FF,D1		; pattern 0xFF
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	moveq	#$55,D1		; pattern 0x55
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
			
	move.b	#$AA,D1		; pattern 0xAA
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	moveq	#RIC_PC_HI, D0	; select PC high
	move.b	D0, (A1)	;

	move.b	#$FF,D1		; pattern 0xFF
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	moveq	#$55,D1		; pattern 0x55
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	move.b	#$AA,D1		; pattern 0xAA
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
				
	moveq	#$00,D1		; pattern 0x00
	move.b	D1, (A2)	; write to PC low
	cmp.b	(A2), D1	; read back check
	bne.s	@90		; jump if error
	
	rts			; good return	
@90:
	move.b	(A2), D2	; D2 = bad data
	move.b	#1, D3		; insure Z = 0
	rts			; return
	
	EJECT

;===================================================================================
;
; Name:		zt_RAM
;
; Function:	Test 8344 Data Memory 
;
; Input:	A2 = starting RAM address
;		A3 = ending RAM address + 1
;
; Output:	Z flag set   => no error
;		Z flag clear => error (D1 = data written; D2 = data read back;
;				       A2 = failed address)
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================
				
zt_RAM:
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	move.l	A2, D3		; save starting location
	moveq	#RIC_DRAM, D0	; select Data memory
	move.b	D0, (A1)	;
	move.b	#$FF,D1		; data pattern
@1:
	move.b	D1, (A2)	; write to memory
	cmp.b	(A2), D1	; read it back check
	bne.s	@90		; jump if errror
				
	addq.l	#2, A2		; addr.ptr++
	cmp.l	A3, A2		; check if reached end
	bne.s	@1
				
	movea.l	D3, A2		; reset pointer to where it started
	moveq	#$55,D1		; data pattern
@2:
	move.b	D1, (A2)	; write to memory
	cmp.b	(A2), D1	; read it back check
	bne.s	@90		; jump if errror
				
	addq.l	#2, A2		; addr.ptr++
	cmp.l	A3, A2		; check if reached end
	bne.s	@2
					
	movea.l	D3, A2		; reset pointer to where it started
	move.b	#$AA,D1		; data pattern
@3:
	move.b	D1, (A2)	; write to memory
	cmp.b	(A2), D1	; read it back check
	bne.s	@90		; jump if errror
				
	addq.l	#2, A2		; addr.ptr++
	cmp.l	A3, A2		; check if reached end
	bne.s	@3
				
	movea.l	D3, A2		; reset pointer to where it started
	moveq	#$00,D1		; data pattern
@4:
	move.b	D1, (A2)	; write to memory
	cmp.b	(A2), D1	; read it back check
	bne.s	@90		; jump if errror
				
	addq.l	#2, A2		; addr.ptr++
	cmp.l	A3, A2		; check if reached end
	bne.s	@4
	
	rts			; good return
@90:
	move.b	(A2), D2	; D2 = data read back
	move.b	#1, D3		; insure Z = 0
	rts			; return
	
	EJECT

;===================================================================================
;
; Name:		zt_IMem
;
; Function:	Test 8344 instruction memory
;
; Input:	None
;
; Output:	Z flag set   => no error
;		Z flag clear => error (D1 = data written; D2 = data read back;
;				       A2 = failed address)
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================
				
zt_IMem:
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	movea.l	#bcpPC, A2	; dummy address for writing to 8344 PC
	move.b	#$FF, D3	; D3 = test pattern
	jsr	bcpimtest	; test 
	bne.s	@90		; jump if error
				
	move.b	#$AA, D3	; D3 = test pattern
	jsr	bcpimtest	; test 
	bne.s	@90		; jump if error
				
	move.b	#$55, D3	; D3 = test pattern
	jsr	bcpimtest	; test 
	bne.s	@90		; jump if error
				
	move.b	#$00, D3	; D3 = test pattern
	jsr	bcpimtest	; test 
@90:
	rts			; return
	
	EJECT

;===================================================================================
;
; Name:		bcpimtest
;
; Function:	Test 8344 instruction memory with a pattern
;
; Input:	D3 = pattern byte
;		A1 = address of 8344 RIC
;		A2 = dummy address to write instruction memory
;
; Output:	Z flag set   => no error
;		Z flag clear => error (D1 = data written; D2 = data read back;
;				       A2 = failed address)
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================

bcpimtest:
	moveq	#RIC_PC_LO, D0	; select PC low
	move.b	D0, (A1)	;
	move.b	#$00, (A2)	; write PC low byte = 00
	moveq	#RIC_PC_HI, D0	; select PC high
	move.b	D0, (A1)	;
	move.b	#$00, (A2)	; write PC high byte = 00
	moveq	#RIC_IMEM, D0	; select instruction memory
	move.b	D0, (A1)	  ;
	move.l	#BCP_IM_SIZE, D4  ; D4 = 8344 instruction memory size
@1006:
	move.b	D3, (A2)	; write low byte
	move.b	D3, (A2)	; write high byte
	subq.l	#1, d4		; decrement count
	bne.s	@1006		; till end of instruction memory

	moveq	#RIC_PC_LO, D0	; select PC low
	move.b	D0, (A1)	;
	move.b	#$00, (A2)	; write PC low byte = 00

	moveq	#RIC_PC_HI, D0	; select PC high
	move.b	D0, (A1)	;
	move.b	#$00, (A2)	; write PC high byte = 00
	moveq	#RIC_IMEM, D0	; select instruction memory
	move.b	D0, (A1)				;
	move.l	#BCP_IM_SIZE, D4  ; D4 = 8344 instruction memory size
@1008:
	move.b	(A2), D1	; D1 = low byte read back
	move.b	(A2), D2	; D2 = high byte read back
	cmp.b	D1, D3		; check if equal
	bne.s	@1009
	cmp.b	D2, D3		; check if equal
	bne.s	@1009
	subq.l	#1, d4		; decrement count
	bne.s	@1008		; till end of instruction memory

@1009:	
	rts			; return to caller
				
	EJECT

;===================================================================================
;
; Name:		load_BCP
;
; Function:	Load 8344 codes to its instruction memory
;		First word (record) of the code table must be FFFF which indicates
;		next record is the Program Counter record.
;		The third record and records thereafter (until it is FFFFF) are
;		records of the codes to be downloaded to 8344 starting from the PC.
;		End of the code is terminated by 2 consecutive records of FFFF.	
;
; Input:	None
;
; Output:	Z flag set   => no error
;		Z flag clear => error 
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================

load_BCP:
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	lea	bcpCodes, A3	; A3 -> 8344 codes in PROM
	move.w	#$FFFF, D4	; D4 = 0xFFFF
	cmp.w	(A3)+, D4	; check if PC indicator record
	bne.s	@90		; error if not
				
	movea.l	#bcpPC, A2	; dummy address for writing to 8344 PC
@10:
	move.w	(A3)+, D3	; D3 = next record
	cmp.w	D3, D4		; check if 0xFFFF
	beq.s	@90		; if yes, finished download
				; otherwise, it's PC for the 8344
	moveq	#RIC_PC_LO, D0	; select PC low
	move.b	D0, (A1)	;
	move.b	D3, (A2)	; write PC low byte

	lsr	#8, D3		; D3 = high order of 8344 PC
	moveq	#RIC_PC_HI, D0	; select PC high
	move.b	D0, (A1)	;
	move.b	D3, (A2)	; write PC high byte
	moveq	#RIC_IMEM, D0	; select instruction memory
	move.b	D0, (A1)	;
@12:
	move.w	(A3)+, D3	; get next record				
	cmp.w	D3, D4		; check if 0xFFFF
	beq.s	@10		; load PC if yes
				
	move.b	D3, (A2)	; write low byte to instruction memory
	lsr	#8, D3		; get high byte to the right
	move.b	D3, (A2)	; write high byte to the instruction memory
	bra.s	@12		; go get next record
@90:
	rts			; return
	
	EJECT

;===================================================================================
;
; Name:		read_BCP
;
; Function:	Read 8344 codes from its instruction memory for debugging purpose.
;
; Input:	None
;
; Output:	Z flag set   => no error
;		Z flag clear => error 
;
; Update:	None
;
; History:	12/03/87: initial version
;
;===================================================================================

read_BCP:
	movea.l	#bcpRIC, A1	; address of 8344 RIC
	movea.l	#bcpPC, A2	; dummy address for accessing to 8344 PC
	move.l	#BCP_IM_SIZE, D3; D3 = 8344 instruction memory size in words
	lsl.l	#1, D3		; D3 = number of bytes
	movea.l	#bcp_rdback, A3	; A3 = buf address to store readbacks
	moveq	#RIC_PC_LO, D0	; select PC low
	move.b	D0, (A1)	;
	move.b	#0, (A2)	; write PC low byte = 00
	moveq	#RIC_PC_HI, D0	; select PC high
	move.b	D0, (A1)	;
	move.b	#0, (A2)	; write PC high byte = 00
	moveq	#RIC_IMEM, D0	; select instruction memory
	move.b	D0, (A1)	;
@12:
	move.b	(A2), D2	; read back
	move.b	D2, (A3)+	; store in buffer
	subi.l	#1, D3		; decrement count
	bne.s	@12
@90:
	rts			; return
	
	EJECT
		
L1Interrupt	Proc	Export	
		move.l	a1, -(sp)		; save reg
		movea.l	#$c00002, a1	
		move.w	(a1), a1 		; clear timer interrupt
		movea.l	#timeCountAddr, a1
		addq.l	#1, (a1) 		; incr timer location
		move.l	(sp)+, a1		; restore reg
		rte
			  
L2Interrupt	PROC	EXPORT
		move.l	a0, -(sp)
		movea.l	#ClrIOPIntr, a0
		move.l	(a0), a0		;read clears interrupt
		move.l	(sp)+, a0
		rte				;GMSIOP interrupt
		
L3Interrupt	PROC	EXPORT			; WHJW: mod to facilitate modular structure
		movem.l	d0/a1, -(sp)
		movea.l	#bcpRIC, a1		;address of 8344 RIC
		moveq	#RIC_DRAM_RUN, d0	;select data memory
		add	#$80, d0
		move.b	d0, (a1)		;toggle interrupt activate line
		movem.l	(sp)+, d0/a1
		rte
		
L4Interrupt	PROC	EXPORT
		rte				;not used on Zorro card
L5Interrupt	PROC	EXPORT
		rte				;not used on Zorro card
L6Interrupt	PROC	EXPORT
		rte				;not used on Zorro card
		
L7Interrupt	PROC	EXPORT			;NMI interrupt
		move.w	(sp)+, a0		;pop sr & forget it
		move.l	(sp)+, a0		;pop return address & forget it
		movea.l	#$ff0004, a0		;location of power-up code starting addr
		move.l	(a0), a0
		jmp	(a0)			;assume supr. stack ptr set by caller
		rte
		
;===================================================================================
; Entry:	(Status indicator routines)
;
; Function:	
;	When execution of 68000 power-on begins, ShowInProgress (which could turn on all LEDs)
;	is called, indicating that the test is in progress.  If primary init crashes
;	it will then be evident that testing did not complete.  If any tests fail,
;	the routine ShowFail is called (perhaps to leave on a red LED), and if all 
;	self-tests pass, the routine ShowPass is called (perhaps to leave on a red LED). 
;	ShowOff is called to turn off all indicator status.
;
;	Note that these routines differ from the 4 status indicator routines in
;	ApplPrimaryInit.a in that they are not performed accross NuBus, but by the
;	cards 68000.
;   
;===================================================================================

ShowInProgress:			;turn on red & green LED or do whatever to indicate test running
	move.l	a1, -(sp)	;save & restore any registers changed
	move.l	#$600001, a1	;currently defined Zorro LED control register
	move.b	#$3, (a1) 	;write to LED control register (turn on red & green)
	move.l	(sp)+, a1
	rts			
	
ShowPass:			;turn on green LED or do whatever to indicate good status
	move.l	a1, -(sp)	;save & restore any registers changed
	move.l	#$600001, a1	;currently defined Zorro LED control register
	move.b	#$1, (a1) 	;write to LED control register (turn on green only)
	move.l	(sp)+, a1
	rts	
	
ShowFail:			;turn on red LED or do whatever to indicate failure
	move.l	a1, -(sp)	;save & restore any registers changed
	move.l	#$600001, a1	;currently defined Zorro LED control register
	move.b	#$2, (a1) 	;write to LED control register (turn on red only)
	move.l	(sp)+, a1
	rts	
	
ShowOff:			;turn off green & red LED or all status indicators
	move.l	a1, -(sp)	;save & restore any registers changed
	move.l	#$600001, a1	;currently defined Zorro LED control register
	move.b	#$0, (a1) 	;write to LED control register (turn off red & green)
	move.l	(sp)+, a1
	rts	
	
	END
;---------------
; 8344 Codes
;---------------

bcpCodes	PROC

	INCLUDE		'btest.68k'	

	EJECT
	END

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