I've been a bit busy on eBay of late, collecting parts to finish off several of my ongoing Hacks. For this one I just PayPal'd the money for a second MiniDock & Floppy Microdock to finish off the @$$ end of this hack.
I just need to get another DuoDock to dress up the front and provide some internal bits to go for a DuoDock III™ Hack! }
_____________________________________________________________________________
jabberwocky
[attachment=1]LisaProfile.jpg[/attachment]
[attachment=0]LisaReferenceShots2.jpg[/attachment]
[attachment=7]603e_CLK_Multipliers.00.2p.jpg[/attachment]
[attachment=6]SIMMspender.00.2p.jpg[/attachment]
[attachment=5]SIMMspender.01.2p.jpg[/attachment]
[attachment=3]30pinMESS.2p.jpg[/attachment]
They are two banks of 4M X 32 bits. Which means that they are built out of sixteen 4M X 4 chips. Each set of eight chips is wired to the same RAS line on the SIMM, with the other set of eight using a different RAS line -- actually probably two RAS lines per bank (set of eight) because there are four RAS lines in a 72 pin SIMM.
Controlling the RAS lines separately is how banks are done on 72 pin SIMMs, as far as I can tell. It looks like it's possible to do the CAS lines individually as well, but I think those just have the potential to control the SIMMs in a byte-wise manner, although I'm not certain about that last bit.
[attachment=4]MacII_Mem_Schematic.2p.jpg[/attachment]
[attachment=2]IIsi-30pinSIMMpinput.2p.jpg[/attachment]
XXX
I just need to get another DuoDock to dress up the front and provide some internal bits to go for a DuoDock III™ Hack! }
_____________________________________________________________________________
jabberwocky
[attachment=1]LisaProfile.jpg[/attachment]
[attachment=0]LisaReferenceShots2.jpg[/attachment]
[attachment=7]603e_CLK_Multipliers.00.2p.jpg[/attachment]
[attachment=6]SIMMspender.00.2p.jpg[/attachment]
[attachment=5]SIMMspender.01.2p.jpg[/attachment]
[attachment=3]30pinMESS.2p.jpg[/attachment]
They are two banks of 4M X 32 bits. Which means that they are built out of sixteen 4M X 4 chips. Each set of eight chips is wired to the same RAS line on the SIMM, with the other set of eight using a different RAS line -- actually probably two RAS lines per bank (set of eight) because there are four RAS lines in a 72 pin SIMM.
Controlling the RAS lines separately is how banks are done on 72 pin SIMMs, as far as I can tell. It looks like it's possible to do the CAS lines individually as well, but I think those just have the potential to control the SIMMs in a byte-wise manner, although I'm not certain about that last bit.
[attachment=4]MacII_Mem_Schematic.2p.jpg[/attachment]
[attachment=2]IIsi-30pinSIMMpinput.2p.jpg[/attachment]
XXX