First results of the hardware hackin' wedge's verification:
Sorry about the faint lines on the .jpg export, I'll post a better one later. edit: Done!
The essentials of the hack, assuming my assumptions are correct, is to hijack all the Bank Select and Row Address Select Lines from the IIsi's Memory controller.
Meanwhile, I'll be disabling the pitiful 1 MB Bank soldered to the MoBo.
Essentially, I'm testing the waters for doing a REVERSE SIMM Saver Hack, replacing all the IIsi's 30 pin SIMMs and said 1 MB Bank with 72 pin SIMM Module(s?) in sockets mounted on a daughtercard PCB that PiggyBacks onto DIP sockets mounted in the unimplemented (zener diode?) SIP thruholes on this SuperMac IIsi PDS Adapter.
Next step is to buzz all the connections again to verify the layout.
Then, or concurrently, I need to do an overlay layer with the pin locations and signals tapped by all those lovely SIP pads!
Then the fun begins, PCB Layout & Prototype Playtime! }
Sorry about the faint lines on the .jpg export, I'll post a better one later. edit: Done!
The essentials of the hack, assuming my assumptions are correct, is to hijack all the Bank Select and Row Address Select Lines from the IIsi's Memory controller.
Meanwhile, I'll be disabling the pitiful 1 MB Bank soldered to the MoBo.
Essentially, I'm testing the waters for doing a REVERSE SIMM Saver Hack, replacing all the IIsi's 30 pin SIMMs and said 1 MB Bank with 72 pin SIMM Module(s?) in sockets mounted on a daughtercard PCB that PiggyBacks onto DIP sockets mounted in the unimplemented (zener diode?) SIP thruholes on this SuperMac IIsi PDS Adapter.
Next step is to buzz all the connections again to verify the layout.
Then, or concurrently, I need to do an overlay layer with the pin locations and signals tapped by all those lovely SIP pads!
Then the fun begins, PCB Layout & Prototype Playtime! }