Ummm, the RAM control lines aren't available in the PDS slot. I kind of missed that detail in the PM a while back. Didn't make the jump that you're grabbing your signals from the PDS slot. Or are you? Perhaps you're just using the PDS card as a convenient circuit board?
Anyway, you may want to think of the computer as a hierarchy of busses. The PDS slot provides access to the CPU bus. But the RAM control signals are behind the memory controller. The CPU bus is on one side of the memory controller and the RAM signals/bus are on the other side of the memory controller.
The Data lines should be common though, but sometimes there are buffers so that the memory controller can detach the RAM portion of the data bus from the rest of the data bus. Buffers are used to split a bus into two, so that separate action can take place in the two segments, or so that stray signals on one segment won't interfere with activity on the other segment.
I would start out by tracing the data lines on the logic board. Get the pinout of the 68030 and an ohmmeter and trace the data signals to see if they lead directly to the SIMM pins, or if there are buffers in between. I would bet that there must be, at least on Bank A, because the video circuitry is supposed to be able to access Bank A while the CPU is accessing bank B and the only way that can happen is if there are some buffers to isolate the two chunks of data bus from each other.
So the data bus will be fairly simple, but that built-in video may be a problem. And you can probably get access to the data bus in the PDS slot.
The address lines are multiplexed to the RAM though. And the memory controller provides refresh signals through the /RAS and /CAS signals. So you really need to steal the memory controller signals (RAM address, /RAS, /CAS, /WE) somewhere between (inclusive) the memory controller and the SIMM sockets/soldered down memory.
Anyway, you may want to think of the computer as a hierarchy of busses. The PDS slot provides access to the CPU bus. But the RAM control signals are behind the memory controller. The CPU bus is on one side of the memory controller and the RAM signals/bus are on the other side of the memory controller.
The Data lines should be common though, but sometimes there are buffers so that the memory controller can detach the RAM portion of the data bus from the rest of the data bus. Buffers are used to split a bus into two, so that separate action can take place in the two segments, or so that stray signals on one segment won't interfere with activity on the other segment.
I would start out by tracing the data lines on the logic board. Get the pinout of the 68030 and an ohmmeter and trace the data signals to see if they lead directly to the SIMM pins, or if there are buffers in between. I would bet that there must be, at least on Bank A, because the video circuitry is supposed to be able to access Bank A while the CPU is accessing bank B and the only way that can happen is if there are some buffers to isolate the two chunks of data bus from each other.
So the data bus will be fairly simple, but that built-in video may be a problem. And you can probably get access to the data bus in the PDS slot.
The address lines are multiplexed to the RAM though. And the memory controller provides refresh signals through the /RAS and /CAS signals. So you really need to steal the memory controller signals (RAM address, /RAS, /CAS, /WE) somewhere between (inclusive) the memory controller and the SIMM sockets/soldered down memory.