It appears that the DRAM in the original macintosh had separate Din and Dout pins. Since the CPU would be the only thing ever writing to RAM, that explains why I didn't see any buffer for the CPU writing to RAM: none was needed. So that's one mystery solved, at least. I'll be using SRAM that has a single bidirectional data bus though, so I'll need to buffer in both directions.

Click to expand...

Wait, where did you see that? The pinout on the hand-drawn psuedo-schematic matches that of a standard 4164. (And actually it appears to match up on the CAD one as well.)

I'm a little puzzled why you'd need a buffer with your SRAM. If the CPU has the ability to wait by manipulating the /DTACK line and holds the contents of its data bus constant until it receives acknowledgement of a successful data transfer then it seems all you'd need to do is tell the CPU to hold its horses whenever the RAM is occupied loading the video shift register. You will of course need a MUX on the address lines so you can timeshare the RAM's address pins between the CPU bus and the video address generator. (I'd *guess* the '253s in the lower left of the PDF schematic might serve that purpose on the original.)

EDIT: No, wait, I was thinking something else when you said "buffer". It does seem like you'll need a selector to keep the CPU from seeing data destined to the shift register, wouldn't you? The only thing I can think of is perhaps in the Mac's design it doesn't *matter* if it sees it? That could be the case if the CPU ignores the state of the data lines until it gets a valid data transfer acknowledgement.