Hey there!
Guide to the Macintosh Family Hardware has this to say:
Now that's not the interesting part; the interesting part is on page 122 regarding the 128K, 512K, and Plus:
I can find more details in Guide to the Macintosh Family Hardware if you want...that's pretty much the gist of it from what I can tell!
Edit: bigmessowires knows a ton about this--he implemented a Mac Plus on an FPGA! I haven't seen him around lately on here, but he would definitely know the exact details...
Guide to the Macintosh Family Hardware has this to say:
It goes on to explain exactly what you said about the 68k looking at address 0 at startup being the reasoning for that behavior.
Now that's not the interesting part; the interesting part is on page 122 regarding the 128K, 512K, and Plus:
In particular, bit 4 of the VIA data register A is used to set this. It looks to me from this book that the VIA register controls a pin on the VIA chip, which is hooked up to an input on the PALs, which change their address decoding logic based on that input. As far as I can tell, the VIA is pretty much just a pair of GPIO ports, 2 timers, and a shift register. So what it comes down to is one of the GPIO port pins is used to control the PALs.
I can find more details in Guide to the Macintosh Family Hardware if you want...that's pretty much the gist of it from what I can tell!
Edit: bigmessowires knows a ton about this--he implemented a Mac Plus on an FPGA! I haven't seen him around lately on here, but he would definitely know the exact details...