Skip to main content
Home Forums 68kMLA Mac SE/30 to SCSI chip pinouts — #14
Post #14 by Gorgonops
Source Forum68kMLA
Category68k
Post DateMon, 8 Oct 2012 - 16:58
Original URLhttps://68kmla.org/bb/threads/mac-se-30-to-scsi-chip-pinouts.26313/
Post
Guide to the Macintosh Family Hardware says:
In the Macintosh SE/30, a card in the 68030 PDS can access system RAM and ROM at the same rate as the main processor: 15.67MB per second.
AFAICT, that corresponds to 4 clock cycles per 32bit read, which seems to match the memory access diagrams I've been looking at.

And that assumes all aligned accesses.
I had a gut feeling the SE/30 might be a *little* faster than the times printed in that DRAM controller datasheet. The PDF had a table in it detailing the cycle times and the number of necessary wait states for various speed DRAMs at different CPU clock speeds, and the DRAM speeds in said table topped out at 150ns. The SE/30 specifies 120ns or faster, so... there you go, one less wait state. In any case, the difference between 12Mb/sec and 15Mb/sec doesn't much change the result that you couldn't realistically expect a faster SCSI chip to make a material difference in the performance of an SE/30. "Low End Mac" had some benchmarks claiming to have gotten about 2MB/sec with a modern drive; I'd wager that said drive was probably keeping the entire data set of the benchmark in cache so the benchmark's 2MB/sec was basically a measure of either how fast the SE/30 can work the 8 bit bus the SCSI controller is sitting on or how quickly it can execute the "read sector" loop in the SCSI driver. (or some combination thereof.)

It is slightly amusing to note that the theoretical performance of the SE/30's RAM is identical to that of a PIO Mode4/UDMA Mode 0 ATA controller. Hang a 1998-vintage bus-mastering IDE controller off the Mac's PDS slot and write a *really* tight DMA-utilizing driver for it and you'll have virtual memory with the same sustained read performance as RAM. (Obviously random access latency would be higher.)

mp.ls