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Home▸ Forums▸ 68kMLA▸ SCSI to IDE, z-80 conv:Prototype, looking for a project lead — #25
Post #25 by James1095
Source Forum68kMLA
CategoryHardware
Post DateWed, 21 Nov 2012 - 22:11
Original URLhttps://68kmla.org/bb/threads/scsi-to-ide-z-80-conv-prototype-looking-for-a-project-lead.26545/
Post
James: I tried that, time and time again. I think its the layout as I didnt route the VCC/GND lines sufficiently enough, decoupling caps too far apart. and the CPUs have thier own crystals, 16mhz. Timing should be irrelevent because of the async 8-bit handshake bus. But thats where things fail. The CF card socket didnt pick up the card correctly either, but I havent even gotten to that point yet as I wanted to iron out the bugs.
There are some tricks you can try to fix that. It won't be pretty, but it will serve as a proof of concept. Solder some decoupling caps directly across the power pins of each IC. Add additional Vcc/Gnd wires tack soldered from the power and ground input pins to each IC. If you suspect a particular trace is routed too close to something else, cut it at each end and replace it with a piece of wire routed differently. If it works, then it proves that the layout is the only problem. It sounds like you're 90% of the way there, the problems that remain are probably something simple.