Elfen said:

There is one point I do not agree with and thats is where 20megs would land if the databus bus were to be expanded. It would not do down past $009FFFF, but only widen the bus, still being with 10megs of memory barrier but 20megs at 32 bits and not 10 megs at 16bits. Thus it would not land into video memory if added by widening the bus.

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No, it *would* be 20MB of RAM. Addresses on the 680x0 series of CPUs are in bytes, not words, look it up. By doubling the width you're doubling the size and landing it on top of the 24 bit ROM/peripheral area. (And again, this is why doubling the width would effectively require a new memory controller. You have to map that additional chunk of RAM "somewhere else" and have a mechanism for switching it in when you go to 32 bit mode.)

(Edit: Actually, that points out another problem, which again means "new memory controller": It's the ASIC that generates the addressing signals for the RAM from the address bus output by the computer. That ASIC knows that RAM is only 16 bits wide and translates accordingly. So, yet again, *IT* has to know you doubled the width of memory or you're essentially going to end up with... 10MB of RAM that's double-mapped, not the 20MB you *want* to get out of this.)