Those are two different projects, either of which were probably prototypes done as proof of concept and determination of the traces needed for such a PCB. I'll be dong something very similar to the bottom one for each of my adapters for Bank B before worrying about actual PCBs. Such prototypes are effectively antenna farms, filling the entire case with nasty RFI or the whole room with the lid off. [}
] ]'>
I've got pics of the prototype and final PCB in another, similar project. I'll dig 'em up to post here. The pic of the 72-pin SIMM with red wires attached might be from a similar project, dunno I'll see when i dig up the pics a/o bookmark.
Meanwhile, the block diagram above shows more of what I'm aiming to do in the Memory Addressing Questions thread . . .
found 'em! ;D
adapt_simm_16k.jpg[/attachment]
http://www.zxprojects.com/index.php/simm-adapter-for-replacing-lower-memory
This is an adaptation of good ole' DIP memory to a 30-pin SIMM, but it illustrates the process nicely. Bank A on the Q605/LC475 may be as badly lamed as on the IIsi and the DRAM on all these systems is SMT anyway. So this process would be fruitless at Bank A's location in the IIsi. So that's why I'm working on moving Bank A to a super-set of Bank B at that location for my project and suggesting an under the board PCB maximification adaptation project for the Q605/LC475that ought to work for the Q630 as well.
] ]'>I've got pics of the prototype and final PCB in another, similar project. I'll dig 'em up to post here. The pic of the 72-pin SIMM with red wires attached might be from a similar project, dunno I'll see when i dig up the pics a/o bookmark.
Meanwhile, the block diagram above shows more of what I'm aiming to do in the Memory Addressing Questions thread . . .
found 'em! ;D
adapt_simm_16k.jpg[/attachment]
http://www.zxprojects.com/index.php/simm-adapter-for-replacing-lower-memory
This is an adaptation of good ole' DIP memory to a 30-pin SIMM, but it illustrates the process nicely. Bank A on the Q605/LC475 may be as badly lamed as on the IIsi and the DRAM on all these systems is SMT anyway. So this process would be fruitless at Bank A's location in the IIsi. So that's why I'm working on moving Bank A to a super-set of Bank B at that location for my project and suggesting an under the board PCB maximification adaptation project for the Q605/LC475that ought to work for the Q630 as well.