Received wisdom: http://lowendmac.com/1990/mac-lc/

The LC was the first Mac to run a 32-bit CPU on a 16-bit data bus, making memory access slower than it should be (the LC benchmarks at about 3/4 the performance of the Mac II, even though both use the same 16 MHz 68020 CPU). Although Apple had retired the 68020 chip with the Mac II in January 1990, it reintroduced it with the LC that October.
To add insult to injury, Apple programmed the ASICs to support no more than 10 MB of RAM even if more was installed.

Click to expand...

My pet theory is that it's not necessarily the Memory Controller (ASIC) mentioned above. Apple could well and truly have hobbled the LC by setting the traces up for the RAM so that the Column Address Select and Row Address Select lines are divvied between the SIMMs and the Soldered MoBo RAM to hold the LC down to that ludicrous 10MB figure. I'm not at all sure how the LC Memory is set up. One or two Banks of RAM . . . could be two banks of 16bit words? Dunno, my brain is fried from playing in Illustrator all day . . .

. . . you'll have to wade into the Dev Notes to find out if the LC's Memory Controller was used in any more capable Macs. It'd be silly to develop a crap ASIC when they could just bork the MoBo design to achieve their nefarious goal. That's the only chink I can envision in the LC's Memory limitations . . .

. . . or you could just wait for a real Memory guy to wade into the fray to tell you the real deal, my theory is a WAG! ;D