You need 9 address bits to get 4 MB in bank A. It's either already there, or uni put it there.

Four "double-banked" 72-pin SIMMs somehow wired as two banks per SIMM makes 8 banks. Don't forget a bank of 30-pin SIMMs is 4 modules because each is 8 bits wide, and you need 4 together to get the 32 bits that will fill the data bus. One 72-pin SIMM is already 32 bits wide.