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Home Forums 68kMLA Memory Addressing Questions — #33
Post #33 by Trash80toHP_Mini
Source Forum68kMLA
CategoryHardware
Post DateMon, 20 Jan 2014 - 17:27
Original URLhttps://68kmla.org/bb/threads/memory-addressing-questions.29653/
Post
More questions:

Since both Bank A and Bank B run their data lines through the 245s, I'm WAGgin' that I'll need to create a similar circuit inside the illustrated box to Buffer the Address and Control lines and a Bank select signal just like the Data lines are currently gated?

Such a circuit will need to multiplex the address and control lines on the MoBo between Bank B (and my ersatz Bank A converters) to reflect the Bank A lines back over to the disconnected "Bank B" on the 72 pin SIMMs through the existing traces on the MoBo?

I may need to similarly hack the Data Line buffering to work from my relocated "Bank A" as well.

Does any of this make sense to someone? :-/

mp.ls