Hrmmm . . . no suggestions? I really could use some help on the 74ALS245 Buffer IC replacements. :-/
Here's the fugly address line multiplexing hack as it now stands:
MDU Cannot Address Banks A & B simultaneously, nor can it read data from A & B simultaneously (see crude Data Line multiplexing hack above.)
All the address lines for Banks A & B are very conveniently located right next to each other on MDU.
Using Diodes (like backflow valves in plumbing) soldered to the lifted legs of the paired Banks A & B Address signals on MDU, the diodes are then soldered/shorted together and the paired signals are soldered to the disconnected pads of all twelve Address lines heading to the Bank B SIMM Slots. The Banks A & B addressing signals are multiplexed on the Bank B traces by the either/or logic of MDU's limited Address and Data line capabilities.
Add those discrete 24 addressing signals multiplexed over the MoBo's Bank B traces to the 64 discrete Data Lines for Banks A & B multiplexed over the MoBo traces for Bank B and I'm down to a very limited number of Bank A control lines left to hack. I haven't looked at it yet, but I haven't come up with any obvious reason why I shouldn't be able to do the same Diode-Short Multiplexing for the diccrete(?) RAS and CAS lines for banks A & B.
If I can get it down to where I only need to run signals over two patch wires to the two n.c. pins of the 30-pin SIMM spec. I'll be happy!
But if I can get it down to patching just the W/E signal for the Bank A DRAM ICs to just one of those n.c. pins to select the Bank A halves of my adapters for the Double Banked 32MB 72-pin SIMMs while MDU is not enabling same for Bank B for the reasons outlined above, that'd be just about perfect! [}
] ]'>
Would somebody PLEASE check out the assumptions I've made above and let me know if this craziness is possible . . .
. . . must I be missing something here? :lol:
Here's the fugly address line multiplexing hack as it now stands:
MDU Cannot Address Banks A & B simultaneously, nor can it read data from A & B simultaneously (see crude Data Line multiplexing hack above.)
All the address lines for Banks A & B are very conveniently located right next to each other on MDU.
Using Diodes (like backflow valves in plumbing) soldered to the lifted legs of the paired Banks A & B Address signals on MDU, the diodes are then soldered/shorted together and the paired signals are soldered to the disconnected pads of all twelve Address lines heading to the Bank B SIMM Slots. The Banks A & B addressing signals are multiplexed on the Bank B traces by the either/or logic of MDU's limited Address and Data line capabilities.
Add those discrete 24 addressing signals multiplexed over the MoBo's Bank B traces to the 64 discrete Data Lines for Banks A & B multiplexed over the MoBo traces for Bank B and I'm down to a very limited number of Bank A control lines left to hack. I haven't looked at it yet, but I haven't come up with any obvious reason why I shouldn't be able to do the same Diode-Short Multiplexing for the diccrete(?) RAS and CAS lines for banks A & B.
If I can get it down to where I only need to run signals over two patch wires to the two n.c. pins of the 30-pin SIMM spec. I'll be happy!
But if I can get it down to patching just the W/E signal for the Bank A DRAM ICs to just one of those n.c. pins to select the Bank A halves of my adapters for the Double Banked 32MB 72-pin SIMMs while MDU is not enabling same for Bank B for the reasons outlined above, that'd be just about perfect! [}
] ]'>Would somebody PLEASE check out the assumptions I've made above and let me know if this craziness is possible . . .
. . . must I be missing something here? :lol: