Here is my CPLD code in a nutshell:
Chip Select/Bank Select Signals.
A20, A21, A22, A23 Address line decode. The chip is hooked up between A0 and A18, or A1 to A19 if you look at the portable bus.
Base RAM:
0000 = No chip selected, all lines off = 0
Extended RAM:
0001 - Chip 1 Select ON, Lower Bank ON = 1
0010 = Chip 1 Select ON, Upper Bank ON = 2
0011 = Chip 2 Select ON, Lower Bank ON = 3
0100 = Chip 2 Select ON, Upper Bank ON = 4
0101 = Chip 3 Select ON, Lower Bank ON = 5
0110 = Chip 3 Select ON, Upper Bank ON = 6
0111 = Chip 4 Select ON, Lower Bank ON = 7
1000 = Chip 4 Select ON, Upper Bank ON = 8
When I say Upper/Lower bank, I mean just toggling A20 high or low. Since the macintosh portable has base RAM at 512K-Word, or 1MB, I decided to break the expansion down into 1 meg chunks as well. Since the toshiba chips are 1M-Word, or 2Mbytes, just deciding where A20 is determines if I am working with the first 512kword, or the second 512kword.
Chip Select/Bank Select Signals.
A20, A21, A22, A23 Address line decode. The chip is hooked up between A0 and A18, or A1 to A19 if you look at the portable bus.
Base RAM:
0000 = No chip selected, all lines off = 0
Extended RAM:
0001 - Chip 1 Select ON, Lower Bank ON = 1
0010 = Chip 1 Select ON, Upper Bank ON = 2
0011 = Chip 2 Select ON, Lower Bank ON = 3
0100 = Chip 2 Select ON, Upper Bank ON = 4
0101 = Chip 3 Select ON, Lower Bank ON = 5
0110 = Chip 3 Select ON, Upper Bank ON = 6
0111 = Chip 4 Select ON, Lower Bank ON = 7
1000 = Chip 4 Select ON, Upper Bank ON = 8
When I say Upper/Lower bank, I mean just toggling A20 high or low. Since the macintosh portable has base RAM at 512K-Word, or 1MB, I decided to break the expansion down into 1 meg chunks as well. Since the toshiba chips are 1M-Word, or 2Mbytes, just deciding where A20 is determines if I am working with the first 512kword, or the second 512kword.