RasterOps RGS14188 User's Guide Preliminary REVISION XA 1 11/2/90 JEFF TINGLEY CONFIDENTIAL THIS DOCUMENT IS THE PROPERTY OF RasterOps REPRODUCllON OF THIS · DOCUMENT IS PROHIBITED . November 2, 1990 RGS14188 User's Guide 1.0 Introduction The RGS14188 Frame Buffer Controller (FBC) is a high-performance CMOS device that controls the video display and dynamic memory of a bit-mapped graphics system. Although the RGS14188 was designed to provide control of varying size, multi-port DRAMs (VRAMs) it works equally well with standard DRAMS and is easily interfaced to a variety of CPUs and buses. The principal role of an FBC is to provide an external processor with virtually unlimited access to (video) memory. It eliminates the delays and overhead caused by display update address generation, reloading shift registers, and DRAM refresh. Furthermore, the FBC reduces the amount of hardware needed to interface a RAM array and provides the user with the utmost flexibility. Highly programmable, the RGS14188 supports a broad range of raster-scan display systems with various resolutions and scan rates. Some of the major functions for RGS14188 FBC are: Generates all control signals necessary to control 256K, 1, 2, and 4 Megabyte VRAM devices, as well as those necessary to control conventional DRAMs of the same sizes. Generates the video synchronization and blanking signals necessary to control a CRT monitor. Accommodates processor data paths of arbitrary widths, working equally well with 8-bit to n-bit processors or bus architectures. Supports both interlaced and non-interlaced displays of essentially any display resolution. Automatically generates the special display-update cycles required by VRAM memories to maintain the CRT display. Automatically performs periodic RAM refresh cycles necessary to maintain the data stored. The block Diagram of a typical system using the RGS14188 is shown in Figure 1-1. 2 RGS14188 User's Guide November 2, 1990 CRT Control Signals RasterOps BGS14188 Host Bus Address Bus DRAM VRAM ROM Video Back End DAC Red Green Blue Data Bus Pixel Clock Figure 1-1 Typical System Using the RGS14188 2.0 Pinout and Signal Descriptions A functional drawing of the RGS14188 is given in Figure 2-1 and the pin number assignments are given in Figure 2-2. A description of each signal is given in the following section. The RGS14188 comes in a 120-terminal plastic quad flat package (PQFP). 3 November 2, 1990 RGS14188 User's Guide Address Input:; ( iP (pull down on (J.7..23] Multiplexed Row and Column Addr CASSelects -RAS1 -RAS2 -RAS3 CASStrobes -CASO -CAS1 -CAS2 -CAS3 Column-address Strobe Column-address Strobe Input latch Enable w ~a: -HCS Host Chip Select +HRD/-HWR ~ §::c -DT/-OE 1 Readylrransfer Acknowlege -PMHOLD (4111A) (4mA) Page Mode Hold Data Buffer Output Enable Vertical Blank ::'ASHIF.T 't~ :: :2}· Address Shift Horizontal Blan -BGACK (4mA) +BG Bus Grant Acknowlege Composite Syn< Bus Grant Input C…

HaRivar Mercury 24 Specification Revision XA1 January 20, 1993 Jeff Tingley RasterOps Corporation PART # 0002-0499 CONFIDENTIAL Mercury 24 January 20, 1993 1.0 Introduction This document establishes the physical and electrical characteristics for the Mercury 24, The Mercury 24 is a high resolution, graphics display board for the Macintosh computer. The Mercury 24 occupies one NuBus slot in the Macintosh. It is capable of six pixel depths, multiple resolutions, and has a QuickDraw accelerator. The connectors for a MIPS co-processor or DSP based daughter board are also included. A block diagram of the Mercury 24 is shown in Figure 1-1. This document is the property of RasterOps. Reproduction of this document is prohibited. Video System Controller Synes RGS14188 8 (Venus) 3 Latched Address E § oo NuBus Interface $ (Earth) 3 2 NuBus Flash Eprom Le Mercury RGS90392 ColorBoard Data Bus a= [ NuBus Expansion ] } g [Ay 6 5 DRAM Array Display Memory L R-Bus Expansion | (Up to 256 MBytes) 1024 x 1024 x 32 BT9046-110 (4 MBytes) Clock Synthesizer Figure 1-1 Mercury 24 Block Diagram 2.0 Hardware Description 2.1 Features Switchable Resolutions of (Software Selectable stored in EEPROM or Monitor ID Selectable) - 1280 x 1024 (16-bit, 75 Hz Vertical Refresh, Non-interlaced) - 1152 x 870 (75 Hz Vertical Refresh, Non-interlaced) - 1024 x 768 (60,75 Hz Vertical Refresh, Non-interlaced) - 832 x 624 (75 Hz Vertical Refresh, Non-interlaced) - 640 x 870 (75 Hz Vertical Refresh, Non-interlaced) - 640 x 480 (66 Hz Vertical Refresh, Non-interlaced) Confidential Material 2 Mercury 24 January 20, 1993 Pixel Depths of 1, 2, 4, 8, 16, and 24-bits NuBus Block Mode Migst/Slave Compatible ~oe Yam acces) 134.2 Million Color Palette (9 bit DACs) Mercury based QuickDraw Accelerator RS-343 Video Compatible 15-Pin D-Submininature Connector (Same as Apple) Hardware Zoom of 1x, 2x, 3x... to 16x Smooth Pan independent of pixel depth 2.2 Overview The Mercury 24 is a stand alone frame buffer. It can display up to 24-bits per pixel in one of many resolutions. It is capable of integer zoom and implements smooth paning in all bit depths. The DACs are 9-bit instead of 8-bit to allow for gammas up to 2.4 without redundant colors. A Mercury based QuickDraw Accelerator is included for maximum performance. As an added feature, the Mercury 24 also supports an MIPS coprocessor or a DSP based daughter card. 3.0 Technical Data 3.1. Absolute Maximum Ratings Supply Voltage, VCC ......esesssssssesessssessesesssseeeseessesseeeeens 5.25 Volts Operating Ambient Temperature Range ...........:: 0 °C to 60 °C Storage Temperature ..........sscsscseeseees vee -65 °C to 150 °C ICC (Supply Current) 0... cessseesesssssssssssesesssesseseseeseseeeenees 40A @5.25V 3.2 Reference Drawings The following items should be referenced for information on the Mercury 24. Mercury 24 Top Assembly LM 2642 Mercury 24 Schematics 0002-0496-1 1 Mercury 24 PCB Fab 0002-0497 Mercury 24 PCA 0002-0498-10 Mercu…

Colorboard 264/SE30 Specification Revision A1 June 1, 1989 Brad Patton RasterOps Corporation PART# XXXX-XXXX CB 264/SE30 Specification June 5, 1989 1.0 Introduction This document establishes the physical and electrical characteristics for the Colorboard 264/SE30 system. The Colorboard 264/SE30 is a high resolution, high speed, graphics display card for the Macintosh SE/30. The Colorboard 264/SE30 occupies the '030 direct slot within the SE/30. It is capable of four pixel depths and two resolutions in it's standard configuration. With the addition of a video memory expansion option the number of pixel depths becomes five. A block diagram of the Colorboard 264/SE30 is shown in Figure 1-1. This document is the property of RasterOps Corporation and is confidential. Reproduction of this document is prohibited. ADDRESS DECOD • CONTROL LOGIC ...0 VIDEO CLOCK SOURCE 30.24 MHz NI ....cc c 0 II) II) w a: c c c C'I 0 Ill (0 0 C'I 0 Ill (0 iii TMS34061 N' 01 u II. ui c ui c .100" x .100" HHcllr ~ ffi ~ ..I 0 RAM ARRAY ....z 512 x 512 x 16/48 a: VIDEO BACK END ASIC 8/24 0 u 0 C'I 0 Ill (0 264/30 Block Diagram Figure 1-1 Colorboard 264/SE30 Block Diagram 2 81473 DAC June 5, 1989 CB 264/SE30 Specification 2.0 Hardware Description 2.1 Overview The Colorboard 264/30's function is to provide the Macintosh SE/30 user with a low cost, versatile, high resolution frame buffer. The Colorboard 264/SE30 supports pixel depths of 1, 2, 4 and 8-bit in it's standard configuration with 24-bit becoming available with the addition of the video memory expansion option. Added features include RasterOps Virtual Screen, hardware zooming of 1X, 2X and 4X and hardware panning for full memory utilization and fast image enlargement. 2.2 Features Switchable Standard Resolutions of - 640 x 480 -ZZZxYYY 64K or 256K ROM Available Pixel Depths of 1, 2, 4, 8 and 24-bit {optional) Occupies SE/30's '030 Direct Slot 256 Colors Displayable from a 16.7 Million Color Palette {standard) 16.7 Million Colors Displayable {with option) 35 and 48KHz Monitors Supported Standard Current Consumption of 1.5 Amps at 5 Volts RS-343A Compatible 15-Pin D-Submininature Connector {Same as Apple) Hardware Zoom of 1X, 2X, and 4X Hardware Pan Virtual Desktop 3 CB 264/SE30 Specification June 5, 1989 FCC Class B Certified Utilizes RasterOps "Video Back End" ASIC Separate H and V Sync Signals on the Video Connector for VGA Com patabi lity 3.0 Technical Data 3.1. Absolute Maximum Ratings Supply Voltage, VCC ...............................................................5.25 Volts Operating Ambient Temperature Range .............................. O °C to 60 °C Storage Temperature ............................................................. -65 °C to 150 °C ICC (Supply Current) ...............................................................1.5 A @ 5.0 V 3.2 Reference Drawings The following items should be referenced for detailed information on the Colorboard 264/SE3…