.Page
;++
;--

TimIt	.Equ *
	Lda	#5				; Time 6 pulses
	Sta	Temp2
	Clc					; Should stay clear unless explicitly set
	Jsr	WtZero				; Look for low, then first high
	Bcs	RsOut				; 2,3	10	No edge within timeout period
	Jsr	RsEdge				; 8	8	Now at known locationo
	Bcs	RsOut				; 2,3	10	No edge within timeout period
	Lda	#0				; 2	12
	Sta	RangeL				; 3	15
	Sta	RangeH				; 3	18	Zero both bytes of counter

;++
;	WtZero & RsEdge both have 36 cycles (18.0 uSec) per tick of RangeL:H
;--

$20	Jsr	WtZero				; Look for low
	Bcs	RsOut				; 2,3
	Jsr	RsEdge				; Wait for next edge on pulse
	Bcs	RsOut				; 2,3
	Dec	Temp2				; 5		When less than zero then exit
	Bpl	$20				; 2,3	15*(2+@+%+#) = 180 cycles

RsOut	.Equ *
	Rts					; 6		Common exit point

WtZero	.Equ *
	Bit	K000				; 3		ccV set to Zero
	Bvc	RsEd				; 3	6

RsEdge	.Equ *					;		Look for a rising edge
	Bit	K0FF				; 3	3	ccV eq 0 == low, ccV eq 1 == high
	Bvs	ReEd				; 3	6
RsEd	.Equ *
	Ldy	#00				; 2	8
	Ldx	#0A0				; 2	10	Constant timeout for pulse counting

$10	Dey					; 2	2
	Bne	$20				; 2,3	4,5
	Dex					; 2	6
	Bne	$30				; 2,3	8,9
	Sec					; 2	10	When X-reg = 0 then return error
	Rts

$20	Nop					; 2	7
	Nop					; 2	9	Waste time

$30	Inc	RangeL				; 5	14
	Bne	$40				; 2,3	16,17
	Inc	RangeH				; 5	21
	Bne	$50				; 3	24	Always taken ??

$40	Pha					; 3	20	Waste more time
	Pla					; 4	24

$50	Lda	Q7L				; 4		Bit7=0 ==>tach low, else tach high
	Bvc	$70				; 2,3	30,31	ccV ==> look for low
	Bpl	$90				; 2,3	32,33	If high then fall thru & exit
	Nop					; 2	34
$60	Rts					; 6

$70	Bpl	$60				; 2,3	33,34	If low then exit

$90	Bcc	$10				; 3	36	Always taken?? -- 18.0 uSec loop

ChkLrg	.Equ *
	Lda	#Lrge				; 5
	Sta	Temp1				; For speed adjustment
	Lda	#WLow
	Beq	ChkComm

ChkSml	.Equ *
	Lda	#Smal				; 1
	Sta	Temp1
	Lda	#TLow

;++
;  ChkComm
;     if H < TL
;       then AdjPlus
;     else if H > TL
;       then TstHih
;     else  if L < Tl
;       then AdjPlus
;     else if L = TL
;       then OK
;  TstHih
;     If H > Th
;        then AdjMinus
;     else if H <> Th
;        then OK
;     else if L <= TH
;        then OK
;     else AdjMinus
;--

ChkComm	.Equ *
	Sta	InxPtrL			; Ptr to which constraints ( low of high )
	Lda	CurClass			; Current track class
	Asl	A			; *2 to address word array
	Tay
	Lda	RangeH
	Cmp	@InxPtrL,y		; High must be greater than or equal to lowtable,y
	Bcc	AdjPlus			; High byte low, must spin slower
	Bne	TsHih			; High byte greater -- must see if w/in high boundary
	Inc
	Lda	RangeL
	Cmp	@InxPtrL,y		; Must be greater than or equal to table,y
	Bcc	AdjPlus			; High bytes = and low byte low - slow it down
	Beq	ChkOK			; Both bytes are equal so within range
	Clc
TsHih	.Equ *				; ccC=1 if branched to here so add +1 for not 'Iny'
	Tya
	Adc	#TblJmp			; 9.
	Tay				; Index now points at high side of range
	Lda	@InxPtrL,y
	Cmp	RangeH			; High byte must be <= high boundary
	Bcc	AdjMinus			; High byte is too high, spin disk faster
	Bne	ChkOK			; If <> then low byte must be w/in range
	Iny				; Point @ low byte of boundary value
	Lda	@InxPtrL,y
	Cmp	RangeL			; Low byte is too high, spin disk faster

ChjkOK	.Equ *
	Clc
	Rts

AdjPlus	.Equ *				; ccC = 0 already
	Ldy	CurClass
	Lda	MSpdTbl,y
	Adc	TEmp1			; Add adjustment value
	Sta	MSpdTbl,y
	Sec
	Rts

AdjMinus	.Equ *
	Ldy	CurClass
	Lda	MSpdTbl,y
	Sec
	Sbc	Temp1
	Sta	MSpdTbl,y
	Sec
	Rts

SpdChk	.Equ *				; Main entry point for speed check
	Lda	#WHih			; '11'x
	Sta	InxPtrH
	Jsr	SetTach			; Make sure in Tach sense mode
	Jsr	TimIt			; Time 6 pulses & abort on timeout
	Bcs	SpdErr
	Jsr	ChkLrg			; Must be within +/- 2%
	Bcc	SpdDone
	Lda	#101.			; 100 times total for attempts to adjust
	Sta	Counter

$10	Dec	Counter
	Beq	SpdErr			; Try for 100 times and abort upon inability to adjust
	Jsr	SetSpeed
	Lda	ScDly
	Jsr	Wait
	Jsr	Timit
	Bcs	SpdErr
	Jsr	ChkLrg
	Bcs	$10			; Loop until speed within +/- 2%

$32	Sec				; Make sure error flag is set
	Dec	Counter
	Beq	SpdErr			; Try for 100 times and abort upon inability to adjust
	Jsr	ChkSml			; Now loop until within +/- .5%
	Bcc	SpdDone
	Jsr	SetSpeed
	Lda	ScDelay
	Jsr	Wait
	Jsr	TimIt
	Bcc	$32

SpdErr	.Equ*
	Lda	#SErrTmt

SpdDone	.Equ *
	Rts

.Page
;++
;
;		VfyCksum -- Verify checksum that was just read.
;
; VfyCksum will undo the mess that CreCksum created by xor'ing the
; checksum into the data bytes.  See teh CreCksum description for the
; alogrithm used to understand what is being undone here.
;
; REGISTERS
;  IN
;	All =	Any value
;  OUT
;	All =	Destroyed
;	ccC =	0 if checksum matches
;		1 if checksum does not match
;
; CALLS
;	NONE
;
;--
VfyCksum	.Equ *				; Entry point for all callers
	Lda	#00			; Init temporary checksums to zero
	Sta	TCksm1
	Sta	TCksm2
	Sta	InxPtrl
	Sta	InxPtrH
	Inc	InxPtrH			; Start at page 1
	Ldy	#0F4			; Only last 12 bytes

VfTop	.Equ *
	Asl	A			; Rotate the third checksum byte
	Php				; Save the status bits
	Adc	#00			; Put carry bit into low bit (8 bit rotate)
	Sta	TCksm3			; Save 3rd checksum byte
	Plp				; Restore status bits
	Lda	@InxPtrL,y		; Read 1st byte of 3 byte loop
	Eor	TCksm3			; restore original data
	Sta	@InxPtrL,y
	Adc	TCksm1
	Sta	TCksm1			; And update the checksum
	Iny
	Bne	$20
	Inc	InxPtrH			; Next page

$20	Lda	@InxPtrL,y		; 2nd of 3 byte loop
	Eor	TCksm1			; Restore originl data
	Sta	@InxPtrL,y
	Adc	TCksm2
	Sta	TCksm2			; And update the checksum
	Iny
	Beq	$60			; Last byte to sum

	Lda	@InxPtrL,y		; 3rd byte of 3 byte loop
	Eor	TCksm2			; Restore original data
	Sta	@InxPtrL,y
	Adc	TckSm3			; Update checksum and leave in A
	Iny
	Bne	VfTop			; Not at page boundary, loop
	Inc	InxPtrH			; Next page
	Bne	VfTop			; Branch always taken

$60	Cmp	CkSm2			; 'A' reg has TCksm2
	Bne	$80
	Lda	TCksm3
	Cmp	Cksum3
	Bne	$80
	Lda	TCksm1
	Cmp	Cksum1
	Bne	$80
	Clc
	Rts

$80	Sec
	Rts

.Page
;++
;	Write16
;
; $10	Ldx	Q6L	; 1	1	Assume worst case
;	Bpl	$10	; 3	4	branch taken
;	Ldx	Q6L	; 4	8	bit will be set
;	Bpl	$10	; 2	10	fall thru
;	Sta	Q6H	; 4	14	put the data into reg
; 31 cycles max after bit is set before UnderRun bit is set.  Using above code
; as start of time critical code,
; total time = ((32-14)+31) = 49 cycles
;--
.Page
	.Org	1A00
Write16	.Equ *
	Ldx	IIob+Sector
	Lda	Nibl,x
	Sta	Sv4
	Ldy	#0			; No speed check bytes
	Sty	InxPtrH
	Tya				; Flag will tell Sync20 to use data mark fields
	Iny				; Write only one set of self_sync bytes
	Jsr	Sync20			; 6	6	Turn on write circuitry & write self-sync bytes
	Ldy	#0F4			; 2	8
	Lda	#0AD			; 2	10	Last byte of header field
	Bne	Pg1x			; 3	13

Pg1	.Equ *				; Code to write out las 12 bytes of page #1
	Stx	Sv4			; 3
Pg1x	Ldx	Q6L			; 4	17
	Bpl	Pg1x			; 2,3	19/20
	Sta	Q6H			; 4	14	Worst case possible

	Ldx	Page01+2,y		; 4	18
	Lda	Nibl,x			; 4	22
	Sta	Sv3			; 3	25
	Txa				; 2	27
	Lsr	A			; 2	29
	Lsr	A			; 2	31
	Sta	Temp1			; 3	34
	Ldx	Page01+1,y		; 4	38
	Lda	Nibl,x			; 4	42
	Sta	Sv2			; 3	45
	Txa				; 2	47
	And	#0C0			; 2	49
	Ora	Temp1			; 3	52
	Lsr	A			; 2	54
	Ldx	Sv4			; 3	57	61-14 = 47
	Stx	Q6H			; 4	61	Write last byte of previous loop

	Lsr	A			; 2	2
	Sta	Temp1			; 3	5
	Lda	Page01,y			; 4	9
	And	#0C0			; 2	11
	Ora	Temp1			; 3	14
	Lsr	A			; 2	16
	Lsr	A			; 2	18
	Tax				; 2	20
	Lda	Nibl,x			; 4	24
	Sta	Q6H			; 4	28

	Ldx	Page01,y			; 4	4
	Iny				; 2	6
	Iny				; 2	8
	Lda	Nibl,x			; 2	12
$15	Ldx	Q6L			; 4	16
	Bpl	$15			; 2,3	18
	Sta	Q6H			; 4	22

	Lda	Sv2			; 3	3	Second  byte of loop
	Ldx	Sv3			; 3	6	Third byte
	Iny				; 2	8
	Bne	Pg1			; 2,3	10	Fetch rest of 12 bytes
					;		fall thru $|& start on Page #2
;++
;
;--

Pg2	.Equ *				; Code to write out first 255 bytes of Page #2
	Stx	Sv4			; 3
$40	Ldx	Q6L			; 4
	Bpl	$40			; 2,3
	Sta	Q6H			; 4	14	Worst case possible

	Ldx	Page02,y			; 4	18
	Lda	Nibl,x			; 4	22
	Sta	Sv3			; 3	25
	Txa				; 2	27
	Lsr	A			; 2	29
	Lsr	A			; 2	31
	Sta	Temp1			; 3	34
	Ldx	Page02+1,y		; 4	38
	Lda	Nibl,x			; 4	42
	Sta	Sv2			; 3	45
	Txa				; 2	47
	And	#0C0			; 2	49
	Ora	Temp1			; 3	52
	Lsr	A			; 2	54
	Ldx	Sv4			; 3	57	61-14=47
	Stx	Q6H			; 4	61	Write out last byte of previous loop

	Lsr	A			; 2	2
	Sta	Temp1			; 3	5
	Lda	Page02,y			; 4	9
	And	#0C0			; 2	11
	Ora	Temp1			; 3	14
	Lsr	A			; 2	16
	Lsr	A			; 2	18
	Tax				; 2	20
	Lda	Nibl,x			; 4	24
	Sta	Q6H			; 4	28


	Ldx	Page02			; 4	4
	Iny				; 2	6
	Iny				; 2	8
	Lda	Nibl,x			; 4	12
$55	Ldx	Q6L			; 4	16
	Bpl	$55			; 2,3	18
	Sta	Q6H			; 4	22
	Lda	Sv2			; 3	3	Second byte of loop
	Ldx	Sv3			; 3	6	Third byte
	Iny				; 2	8
	Cpy	#Pg2Len			; 2	10
	Bne	Pg2			; 2,3	12	Fetch rest of 255 bytes

	Jsr	WrAX			; 6	26/6	Write Nibls in A and X
	Lda	Page03			; 4	10
	Lda	Nibl,x			; 4	14
	Sta	Sv4			; 3	17
	Lda	CpBy01			; 3	20
	Jsr	WrNibl			; 6	26/6

	Ldy	#02			; 2	8	For use in Pg3
	Ldx	Page02+0FF		; 4	12
	Jsr	WrByteX			; 6	18/6

	Ldx	Page03			; 4	10
	Lda	Nibl,x			; 4	14
	Bne	Pg3x			; 3	17

WrAX	.Equ *				; Write nibls that are in A & X (Sv3)
	Jsr	WrNibl			; 6	32/6
	Lda	Sv3			; 3	9
	Jmp	WrNibl			; 3	12/6

;++
;
;--

WrByte	.Equ *				; Nibbize byte in A-reg before starting
	Tax				; 2
WrByteX	.Equ *				; Use byte in X-reg
	Lda	Nibl,x			; 4

WrNibl	.Equ *				; Wait for handshake bit, then write data in A-reg
	Ldx	Q6L			; 4
	Bpl	WrNibl			; 2,3
	Sta	Q6H			; 4
	Rts				; 6

	.Align	0100
Pg3	.Equ *				; Code to write out first 254 bytes of page #3
	Stx	Sv4			; 3
Pg3x	Ldx	Q6L			; 4
	Bpl	Pg3x			; 2,3
	Sta	Q6H			; 4	14

	Ldx	Page03+2,y		; 4	18
	Lda	Nibl,x			; 4	22
	Sta	Sv3			; 3	25
	Txa				; 2	27
	Lsr	A			; 2	29
	Lsr	A			; 2	31
	Sta	Temp1			; 3	34
	Ldx	Page03			; 4	38
	Lda	Nibl,x			; 4	42
	Sta	Sv2			; 3	45
	Txa				; 2	47
	And	#0C0			; 2	49
	Ora	Temp1			; 3	52
	Lsr	A			; 2	54
	Ldx	Sv4			; 3	57	61-14 = 47
	Stx	Q6H			; 4	61	Write last byte of previous loop

	Lsr	A			; 2	2
	Sta	Temp1			; 3	5
	Lda	Page03			; 4	9
	And	#0C0			; 2	11
	Ora	Temp1			; 3	14
	Lsr	A			; 2	16
	Lsr	A			; 2	18
	Tax				; 2	20
	Lda	Nibl,x			; 4	24
	Sta	Q6H			; 4	28	Composite of 3 bytes

	Ldx	Page03,y			; 4	4
	Iny				; 2	6
	Iny				; 2	8
	Lda	Nibl,x			; 4	12
$85	Ldx	Q6L			; 4	16
	Bpl	$85			; 2,3	18
	Sta	Q6H			; 4	22

	Lda	Sv2			; 3	3	Second byte of loop
	Ldx	Sv3			; 3	6	Third loop
	Iny				; 2	8
	Cpy	#Pg3Len			; 2	10
	Bne	Pg3			; 2,3	12	Fetch rest of 254 bytes

	Jsr	WrAX			; 6	26/6	Write Nibls in A & X (Sv3)
	Ldx	Page03+0FF		; 4	10
	Lda	Nibl,x			; 4	14
	Sta	Sv3			; 3	17
	Lda	CpBy02			; 3	20
	Jsr	WrNibl			; 6	26/6
	Ldx	Page03+0FE		; 4	10
	Lda	Nibl,x			; 4	14
	Jsr	WrAX			; 6	20/6

	Ldy	#Cksum1			; 2	8	Absolute addr of 3 cksum bytes
	Sty	InxPtrL			; 3	11
	Lda	CpCkSum			; 3	14
$95	Ldx	Q6L			; 4	18
	Bpl	$95			; 2,3	20
	Sta	Q6H			; 4	24
	Ldy	#0			; 2	2
$99	Lda	@InxPtrL,y		; 6	8
	Jsr	WrByte			; 3	11/6
	Iny				; 2	8
	Cpy	#3			; 2	10
	Bne	$99			; 2,3	12
					; Fall thru & write final bitslip marks & end
	Lda	DatMk4			; 3
	Jsr	WrNibl			; 6
	Lda	DatMk5			; 3
	Jsr	WrNibl			; 6

ShtOff	.Equ *				; Write 2 bitslip and return /WrUnderRun
	Lda	#0FF			; 2
	Jsr	WrNibl			; 6
	Jsr	WrNibl			; 6
	Clc				; 2
	Lda	Q6L			; 4	Bit6 = UnderRun bit
	And	#40			; 2	Leave only bit 6
	Bne	$38			; 2,3	If = 1 then no underrun occurred
	Lda	#ErrWrt			; Obscure error code #
	Sec				; 2

$38	Sta	Q6H			; 4	Put into write load state
	Ldx	Q7L			; 4	Now into write protect - Sense state
	Rts				; 6