AppleNet PCB B.Jpg

Lisa · JPG

Filename	`AppleNet_PCB_b.jpg`
Size	0.47 MB
Subsection	appleNet
Downloads	4

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Image

Click to open at full size in a new tab.

341 0180.JED

Lisa · PAL/GAL logic (JED)

Filename	`341-0180.JED`
Size	0.00 MB
Subsection	appleNet
Downloads	3

Download

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

About this file

This is a PAL/GAL logic (JED) — a binary artifact that can't be previewed in the browser. JED files encode PAL/GAL logic device programming data; open them with a JEDEC programmer or a text editor for inspection.

341 0182.Txt

Lisa · TXT

Filename	`341-0182.txt`
Size	0.05 MB
Subsection	appleNet
Downloads	3

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Contents

seg000:0000		; Base Address:	0000h Range: 0000h - 0800h Loaded length: 0800h
seg000:0000		
seg000:0000		; Processor:	    Z8
seg000:0000		; Target assembler: Zilog Z8 assembler
seg000:0000		; Byte sex	  : Big	endian
seg000:0000		
seg000:0000		; ���������������������������������������������������������������������������
seg000:0000		
seg000:0000		; segment seg000
seg000:0000 00 00	irq0:		.word irq0		; DATA XREF: seg000:0000o
seg000:0000							; seg000:0002o	...
seg000:0000							; T0, Serial out
seg000:0002 00 00	irq1:		.word irq0		; T0, Serial out
seg000:0004 05 53	irq2:		.word sub_553		; DAV2,	IRQ2, TIN, Comparator
seg000:0006 00 00	irq3:		.word irq0		; T0, Serial out
seg000:0008 00 00	irq4:		.word irq0		; T0, Serial out
seg000:000A 07 CD	irq5:		.word sub_7CD		; T1
seg000:000C		
seg000:000C		; ��������������� S U B	R O U T	I N E ���������������������������������������
seg000:000C		
seg000:000C		
seg000:000C				; public start
seg000:000C		start:
seg000:000C 9F				ei	
seg000:000D 8F				di	
seg000:000E E4 00 70			ld	byte_870, p0	; Port 0
seg000:0011 E4 FD 71			ld	byte_871, rp	; Register pointer
seg000:0014 E4 02 72			ld	byte_872, p2	; Port 2
seg000:0017 E4 03 73			ld	byte_873, p3	; Port 3
seg000:001A E6 03 30			ld	p3, #30h	; Port 3
seg000:001D E6 F7 01			ld	p3m, #1		; Port 3 mode
seg000:0020 31 70			srp	#70h
seg000:0022 4C 10			ld	R4, #10h
seg000:0024 5C 12			ld	R5, #12h
seg000:0026 6C 04			ld	R6, #4
seg000:0028 E6 00 30			ld	p0, #30h	; Port 0
seg000:002B E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:002E 92 64			lde	@RR4, R6
seg000:0030 E6 00 B0			ld	p0, #-50h	; Port 0
seg000:0033 31 20			srp	#20h
seg000:0035 CC 10			ld	R12, #10h
seg000:0037 B0 ED			clr	R13
seg000:0039 B0 EB			clr	R11
seg000:003B 92 BC			lde	@RR12, R11
seg000:003D DE				inc	R13
seg000:003E 92 BC			lde	@RR12, R11
seg000:0040 DE				inc	R13
seg000:0041 92 BC			lde	@RR12, R11
seg000:0043 DE				inc	R13
seg000:0044 92 BC			lde	@RR12, R11
seg000:0046 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:0049 E6 00 F0			ld	p0, #-10h	; Port 0
seg000:004C B0 10			clr	byte_810
seg000:004E B0 13			clr	byte_813
seg000:0050 E6 1E 7F			ld	byte_81E, #7Fh
seg000:0053 E6 FF 80			ld	spl, #80h	; Stack	pointer
seg000:0056		
seg000:0056		loc_56:					; CODE XREF: start+6Ej
seg000:0056							; start+FDj
seg000:0056 EC 10			ld	R14, #10h
seg000:0058 F8 EB			ld	R15, R11
seg000:005A E6 00 A0			ld	p0, #-60h	; Port 0
seg000:005D E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:0060 82 0E			lde	R0, @RR14
seg000:0062 FE				inc	R15
seg000:0063 82 1E			lde	R1, @RR14
seg000:0065 FE				inc	R15
seg000:0066 FE				inc	R15
seg000:0067 82 3E			lde	R3, @RR14
seg000:0069 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:006C E6 00 E0			ld	p0, #-20h	; Port 0
seg000:006F 42 33			or	R3, R3
seg000:0071 5B 19			jr	MI, loc_8C
seg000:0073 F8 13			ld	R15, byte_813
seg000:0075		
seg000:0075		loc_75:					; CODE XREF: start+6Cj
seg000:0075 D6 03 03			call	sub_303
seg000:0078 FA FB			djnz	R15, loc_75
seg000:007A 8B DA			jr	loc_56
seg000:007C		; ���������������������������������������������������������������������������
seg000:007C 01 0C			dec	@byte_80C
seg000:007E 01 CB			dec	@byte_8CB
seg000:0080 03 1F			add	R1, @R15
seg000:0082 02 86			add	R8, R6
seg000:0084 02 A0			add	R10, R0
seg000:0086 02 A6			add	R10, R6
seg000:0088 02 BC			add	R11, R12
seg000:008A 02 C6			add	R12, R6
seg000:008C		
seg000:008C		loc_8C:					; CODE XREF: start+65j
seg000:008C E6 1F 04			ld	byte_81F, #4
seg000:008F		
seg000:008F		loc_8F:					; CODE XREF: start+FBj
seg000:008F F8 E3			ld	R15, R3
seg000:0091 56 EF 0F			and	R15, #0Fh
seg000:0094 6B 15			jr	Z, loc_AB
seg000:0096 A6 EF 08			cp	R15, #8
seg000:0099 BB 10			jr	UGT, loc_AB
seg000:009B 90 EF			rl	R15
seg000:009D EC 00			ld	R14, #0
seg000:009F 06 EF 7A			add	R15, #7Ah
seg000:00A2 C2 CE			ldc	R12, @RR14
seg000:00A4 FE				inc	R15
seg000:00A5 C2 DE			ldc	R13, @RR14
seg000:00A7 B0 E2			clr	R2
seg000:00A9 30 2C			jp	@word_82C
seg000:00AB		; ���������������������������������������������������������������������������
seg000:00AB		
seg000:00AB		loc_AB:					; CODE XREF: start+88j
seg000:00AB							; start+8Dj ...
seg000:00AB 2C 80			ld	R2, #80h
seg000:00AD		
seg000:00AD		loc_AD:					; CODE XREF: seg000:01C8j
seg000:00AD							; seg000:0283j	...
seg000:00AD E6 1F 02			ld	byte_81F, #2
seg000:00B0 9F				ei	
seg000:00B1 31 20			srp	#20h
seg000:00B3		
seg000:00B3		loc_B3:					; CODE XREF: start+F3j
seg000:00B3 56 E3 7F			and	R3, #7Fh
seg000:00B6 EC 10			ld	R14, #10h
seg000:00B8 F8 EB			ld	R15, R11
seg000:00BA FE				inc	R15
seg000:00BB FE				inc	R15
seg000:00BC E6 00 A0			ld	p0, #-60h	; Port 0
seg000:00BF E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:00C2 8F				di	
seg000:00C3 92 2E			lde	@RR14, R2
seg000:00C5 FE				inc	R15
seg000:00C6 92 3E			lde	@RR14, R3
seg000:00C8 A6 E3 01			cp	R3, #1
seg000:00CB 6B 21			jr	Z, loc_EE
seg000:00CD E6 1F 03			ld	byte_81F, #3
seg000:00D0 9F				ei	
seg000:00D1 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:00D4 E6 00 E0			ld	p0, #-20h	; Port 0
seg000:00D7		
seg000:00D7		loc_D7:					; CODE XREF: start+F7j
seg000:00D7 AC 40			ld	R10, #40h
seg000:00D9 52 A3			and	R10, R3
seg000:00DB 54 10 EA			and	R10, byte_810
seg000:00DE 6B 07			jr	Z, loc_E7
seg000:00E0 8F				di	
seg000:00E1 E6 03 20			ld	p3, #20h	; Port 3
seg000:00E4 E6 03 30			ld	p3, #30h	; Port 3
seg000:00E7		
seg000:00E7		loc_E7:					; CODE XREF: start+D2j
seg000:00E7 8F				di	
seg000:00E8 06 EB 04			add	R11, #4
seg000:00EB 56 EB 0C			and	R11, #0Ch
seg000:00EE		
seg000:00EE		loc_EE:					; CODE XREF: start+BFj
seg000:00EE B0 1F			clr	byte_81F
seg000:00F0		
seg000:00F0		loc_F0:					; CODE XREF: sub_553+1F2j
seg000:00F0							; sub_553+224j	...
seg000:00F0 E6 FF 80			ld	spl, #80h	; Stack	pointer
seg000:00F3 9F				ei	
seg000:00F4 31 20			srp	#20h
seg000:00F6 A8 1F			ld	R10, byte_81F
seg000:00F8 00 EA			dec	R10
seg000:00FA 6D 03 80			jp	Z, loc_380
seg000:00FD 00 EA			dec	R10
seg000:00FF 6B B2			jr	Z, loc_B3
seg000:0101 00 EA			dec	R10
seg000:0103 6B D2			jr	Z, loc_D7
seg000:0105 00 EA			dec	R10
seg000:0107 6B 86			jr	Z, loc_8F
seg000:0109 8D 00 56			jp	loc_56
seg000:0109		; End of function start
seg000:0109		
seg000:010C		; ���������������������������������������������������������������������������
seg000:010C 8F				di	
seg000:010D B0 1F			clr	byte_81F
seg000:010F B0 13			clr	byte_813
seg000:0111 B0 FB			clr	imr		; Interrupt mask register
seg000:0113 B0 10			clr	byte_810
seg000:0115 B0 EB			clr	R11
seg000:0117 3C 01			ld	R3, #1
seg000:0119 31 00			srp	#0
seg000:011B 6C 20			ld	R6, #20h
seg000:011D B0 E7			clr	R7
seg000:011F B0 EF			clr	R15
seg000:0121 B0 EE			clr	R14
seg000:0123 0C B0			ld	R0, #-50h
seg000:0125 E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:0128		
seg000:0128		loc_128:				; CODE XREF: seg000:0132j
seg000:0128 5C 10			ld	R5, #10h
seg000:012A 00 EF			dec	R15
seg000:012C		
seg000:012C		loc_12C:				; CODE XREF: seg000:0130j
seg000:012C 80 E6			decw	RR6
seg000:012E 92 F6			lde	@RR6, R15
seg000:0130 5A FA			djnz	R5, loc_12C
seg000:0132 EA F4			djnz	R14, loc_128
seg000:0134 B0 EA			clr	R10
seg000:0136		
seg000:0136		loc_136:				; CODE XREF: seg000:0145j
seg000:0136 5C 10			ld	R5, #10h
seg000:0138		
seg000:0138		loc_138:				; CODE XREF: seg000:0142j
seg000:0138 82 E6			lde	R14, @RR6
seg000:013A A2 EF			cp	R14, R15
seg000:013C EB 09			jr	NZ, loc_147
seg000:013E 92 A6			lde	@RR6, R10
seg000:0140 A0 E6			incw	RR6
seg000:0142 5A F4			djnz	R5, loc_138
seg000:0144 FE				inc	R15
seg000:0145 EB EF			jr	NZ, loc_136
seg000:0147		
seg000:0147		loc_147:				; CODE XREF: seg000:013Cj
seg000:0147 F9 1E			ld	byte_81E, R15
seg000:0149 00 1E			dec	byte_81E
seg000:014B 76 E6 07			tm	R6, #7
seg000:014E EB 04			jr	NZ, loc_154
seg000:0150 42 77			or	R7, R7
seg000:0152 6B 03			jr	Z, loc_157
seg000:0154		
seg000:0154		loc_154:				; CODE XREF: seg000:014Ej
seg000:0154 46 22 40			or	byte_822, #40h
seg000:0157		
seg000:0157		loc_157:				; CODE XREF: seg000:0152j
seg000:0157 3C 10			ld	R3, #10h
seg000:0159 3C 30			ld	R3, #30h
seg000:015B 76 E3 0C			tm	R3, #0Ch
seg000:015E 6B 03			jr	Z, loc_163
seg000:0160 46 22 20			or	byte_822, #20h
seg000:0163		
seg000:0163		loc_163:				; CODE XREF: seg000:015Ej
seg000:0163 8C 10			ld	R8, #10h
seg000:0165 9C 12			ld	R9, #12h
seg000:0167 0C 30			ld	R0, #30h
seg000:0169 4C 06			ld	R4, #6
seg000:016B 92 48			lde	@RR8, R4
seg000:016D 0C B0			ld	R0, #-50h
seg000:016F 4C 49			ld	R4, #49h
seg000:0171 92 48			lde	@RR8, R4
seg000:0173 0C 30			ld	R0, #30h
seg000:0175 4C 05			ld	R4, #5
seg000:0177 92 48			lde	@RR8, R4
seg000:0179 0C B0			ld	R0, #-50h
seg000:017B 4C 02			ld	R4, #2
seg000:017D 92 48			lde	@RR8, R4
seg000:017F 0C 30			ld	R0, #30h
seg000:0181 4C 04			ld	R4, #4
seg000:0183 92 48			lde	@RR8, R4
seg000:0185 0C B0			ld	R0, #-50h
seg000:0187 6C 07			ld	R6, #7
seg000:0189 7C FF			ld	R7, #-1
seg000:018B		
seg000:018B		loc_18B:				; CODE XREF: seg000:0191j
seg000:018B C2 46			ldc	R4, @RR6
seg000:018D 92 48			lde	@RR8, R4
seg000:018F 80 E6			decw	RR6
seg000:0191 DB F8			jr	PL, loc_18B
seg000:0193 0C 30			ld	R0, #30h
seg000:0195 4C 0B			ld	R4, #0Bh
seg000:0197 92 48			lde	@RR8, R4
seg000:0199 0C B0			ld	R0, #-50h
seg000:019B 82 48			lde	R4, @RR8
seg000:019D 82 58			lde	R5, @RR8
seg000:019F 0C 30			ld	R0, #30h
seg000:01A1 EC 04			ld	R14, #4
seg000:01A3 92 E8			lde	@RR8, R14
seg000:01A5 0C B0			ld	R0, #-50h
seg000:01A7 31 20			srp	#20h
seg000:01A9 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:01AC E6 FF 80			ld	spl, #80h	; Stack	pointer
seg000:01AF D6 02 E7			call	sub_2E7
seg000:01B2 E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:01B5 AC 2C			ld	R10, #2Ch
seg000:01B7 92 AE			lde	@RR14, R10
seg000:01B9 FE				inc	R15
seg000:01BA A8 1E			ld	R10, byte_81E
seg000:01BC 92 AE			lde	@RR14, R10
seg000:01BE FE				inc	R15
seg000:01BF A8 04			ld	R10, byte_804
seg000:01C1 92 AE			lde	@RR14, R10
seg000:01C3 FE				inc	R15
seg000:01C4 A8 05			ld	R10, byte_805
seg000:01C6 92 AE			lde	@RR14, R10
seg000:01C8		
seg000:01C8		loc_1C8:				; CODE XREF: seg000:01D0j
seg000:01C8 8D 00 AD			jp	loc_AD
seg000:01CB		; ���������������������������������������������������������������������������
seg000:01CB D6 02 E7			call	sub_2E7
seg000:01CE 42 11			or	R1, R1
seg000:01D0 6B F6			jr	Z, loc_1C8
seg000:01D2 76 10 10			tm	byte_810, #10h
seg000:01D5 6B 05			jr	Z, loc_1DC
seg000:01D7 A6 E1 0A			cp	R1, #0Ah
seg000:01DA 7B 06			jr	C, loc_1E2
seg000:01DC		
seg000:01DC		loc_1DC:				; CODE XREF: seg000:01D5j
seg000:01DC A6 E1 0E			cp	R1, #0Eh
seg000:01DF ED 00 AB			jp	NZ, loc_AB
seg000:01E2		
seg000:01E2		loc_1E2:				; CODE XREF: seg000:01DAj
seg000:01E2 8F				di	
seg000:01E3 DC 10			ld	R13, #10h
seg000:01E5 C8 E1			ld	R12, R1
seg000:01E7 E6 00 B0			ld	p0, #-50h	; Port 0
seg000:01EA E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:01ED		
seg000:01ED		loc_1ED:				; CODE XREF: seg000:01EFj
seg000:01ED 83 DE			ldei	@R13, @RR14
seg000:01EF CA FC			djnz	R12, loc_1ED
seg000:01F1 A6 E1 0E			cp	R1, #0Eh
seg000:01F4 EB 42			jr	NZ, loc_238
seg000:01F6 A8 1A			ld	R10, byte_81A
seg000:01F8 EC 10			ld	R14, #10h
seg000:01FA FC 10			ld	R15, #10h
seg000:01FC 92 AE			lde	@RR14, R10
seg000:01FE FE				inc	R15
seg000:01FF 92 AE			lde	@RR14, R10
seg000:0201 A9 0B			ld	byte_80B, R10
seg000:0203 A9 6C			ld	byte_86C, R10
seg000:0205 E9 0C			ld	byte_80C, R14
seg000:0207 F9 0D			ld	byte_80D, R15
seg000:0209 FE				inc	R15
seg000:020A E9 32			ld	byte_832, R14
seg000:020C F9 33			ld	byte_833, R15
seg000:020E 48 1A			ld	R4, byte_81A
seg000:0210 04 1B E4			add	R4, byte_81B
seg000:0213 08 1A			ld	R0, byte_81A
seg000:0215 D6 02 E7			call	sub_2E7
seg000:0218 68 EE			ld	R6, R14
seg000:021A 78 EF			ld	R7, R15
seg000:021C 69 06			ld	byte_806, R6
seg000:021E 69 6A			ld	byte_86A, R6
seg000:0220 79 07			ld	byte_807, R7
seg000:0222 79 6B			ld	byte_86B, R7
seg000:0224 58 1C			ld	R5, byte_81C
seg000:0226 04 1D E5			add	R5, byte_81D
seg000:0229 08 1C			ld	R0, byte_81C
seg000:022B D6 02 E7			call	sub_2E7
seg000:022E 88 EE			ld	R8, R14
seg000:0230 98 EF			ld	R9, R15
seg000:0232 E6 3C 10			ld	byte_83C, #10h
seg000:0235 E6 3D 90			ld	byte_83D, #-70h
seg000:0238		
seg000:0238		loc_238:				; CODE XREF: seg000:01F4j
seg000:0238 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:023B E6 00 F0			ld	p0, #-10h	; Port 0
seg000:023E B0 40			clr	byte_840
seg000:0240 B0 0A			clr	byte_80A
seg000:0242 DC 50			ld	R13, #50h
seg000:0244 CC 1A			ld	R12, #1Ah
seg000:0246 B0 EA			clr	R10
seg000:0248		
seg000:0248		loc_248:				; CODE XREF: seg000:024Bj
seg000:0248 F3 DA			ld	@R13, R10
seg000:024A DE				inc	R13
seg000:024B CA FB			djnz	R12, loc_248
seg000:024D E6 51 C4			ld	byte_851, #-3Ch
seg000:0250 76 10 01			tm	byte_810, #1
seg000:0253 EB 03			jr	NZ, loc_258
seg000:0255 B6 51 40			xor	byte_851, #40h
seg000:0258		
seg000:0258		loc_258:				; CODE XREF: seg000:0253j
seg000:0258 76 10 02			tm	byte_810, #2
seg000:025B 6B 03			jr	Z, loc_260
seg000:025D 46 51 01			or	byte_851, #1
seg000:0260		
seg000:0260		loc_260:				; CODE XREF: seg000:025Bj
seg000:0260 46 10 10			or	byte_810, #10h
seg000:0263 E4 10 50			ld	byte_850, byte_810
seg000:0266 E6 F5 80			ld	pre0, #80h	; T0 prescaler
seg000:0269 E6 F3 06			ld	pre1, #6	; T1 prescaler
seg000:026C E6 4C 04			ld	byte_84C, #4
seg000:026F 04 11 4C			add	byte_84C, byte_811
seg000:0272 E6 F4 01			ld	t0, #1		; Timer/counter	0
seg000:0275 E6 F2 08			ld	t1, #8		; Timer/counter	1
seg000:0278 B0 FA			clr	irq		; Interrupt request register
seg000:027A E6 0A 04			ld	byte_80A, #4
seg000:027D E6 FB 20			ld	imr, #20h	; Interrupt mask register
seg000:0280 E6 F1 3F			ld	tmr, #3Fh	; Timer	mode
seg000:0283 8D 00 AD			jp	loc_AD
seg000:0286		; ���������������������������������������������������������������������������
seg000:0286 A4 1E E0			cp	R0, byte_81E
seg000:0289 FD 00 AB			jp	NC, loc_AB
seg000:028C D6 02 E7			call	sub_2E7
seg000:028F DC 50			ld	R13, #50h
seg000:0291 CC 20			ld	R12, #20h
seg000:0293 E6 00 A0			ld	p0, #-60h	; Port 0
seg000:0296 E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:0299		
seg000:0299		loc_299:				; CODE XREF: seg000:029Bj
seg000:0299 93 DE			ldei	@RR14, @R13
seg000:029B CA FC			djnz	R12, loc_299
seg000:029D 8D 00 AD			jp	loc_AD
seg000:02A0		; ���������������������������������������������������������������������������
seg000:02A0 B6 51 80			xor	byte_851, #80h
seg000:02A3 8D 00 AD			jp	loc_AD
seg000:02A6		; ���������������������������������������������������������������������������
seg000:02A6 EC 10			ld	R14, #10h
seg000:02A8 F8 EB			ld	R15, R11
seg000:02AA E6 00 A0			ld	p0, #-60h	; Port 0
seg000:02AD E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:02B0 08 44			ld	R0, byte_844
seg000:02B2 92 0E			lde	@RR14, R0
seg000:02B4 FE				inc	R15
seg000:02B5 18 45			ld	R1, byte_845
seg000:02B7 92 1E			lde	@RR14, R1
seg000:02B9 8D 00 AD			jp	loc_AD
seg000:02BC		; ���������������������������������������������������������������������������
seg000:02BC 09 44			ld	byte_844, R0
seg000:02BE 19 45			ld	byte_845, R1
seg000:02C0 46 51 02			or	byte_851, #2
seg000:02C3 8D 00 AD			jp	loc_AD
seg000:02C6		; ���������������������������������������������������������������������������
seg000:02C6 A8 E0			ld	R10, R0
seg000:02C8 06 EA 0F			add	R10, #0Fh
seg000:02CB 7B 1F			jr	C, loc_2EC
seg000:02CD A4 1E EA			cp	R10, byte_81E
seg000:02D0 BB 20			jr	UGT, loc_2F2
seg000:02D2 D6 02 E7			call	sub_2E7
seg000:02D5 B0 ED			clr	R13
seg000:02D7 B0 EC			clr	R12
seg000:02D9 8F				di	
seg000:02DA E6 00 A0			ld	p0, #-60h	; Port 0
seg000:02DD E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:02E0		
seg000:02E0		loc_2E0:				; CODE XREF: seg000:02E2j
seg000:02E0 93 DE			ldei	@RR14, @R13
seg000:02E2 CA FC			djnz	R12, loc_2E0
seg000:02E4 8D 00 AD			jp	loc_AD
seg000:02E7		
seg000:02E7		; ��������������� S U B	R O U T	I N E ���������������������������������������
seg000:02E7		
seg000:02E7		
seg000:02E7		sub_2E7:				; CODE XREF: seg000:01AFp
seg000:02E7							; seg000:01CBp	...
seg000:02E7 F8 E0			ld	R15, R0
seg000:02E9 A6 EF 02			cp	R15, #2
seg000:02EC		
seg000:02EC		loc_2EC:				; CODE XREF: seg000:02CBj
seg000:02EC 7D 00 AB			jp	C, loc_AB
seg000:02EF A4 1E EF			cp	R15, byte_81E
seg000:02F2		
seg000:02F2		loc_2F2:				; CODE XREF: seg000:02D0j
seg000:02F2 BD 00 AB			jp	UGT, loc_AB
seg000:02F5 F0 EF			swap	R15
seg000:02F7 E8 EF			ld	R14, R15
seg000:02F9 56 EE 0F			and	R14, #0Fh
seg000:02FC 56 EF F0			and	R15, #-10h
seg000:02FF 46 EE 10			or	R14, #10h
seg000:0302 AF				ret	
seg000:0302		; End of function sub_2E7
seg000:0302		
seg000:0303		
seg000:0303		; ��������������� S U B	R O U T	I N E ���������������������������������������
seg000:0303		
seg000:0303		
seg000:0303		sub_303:				; CODE XREF: start+69p
seg000:0303							; sub_7CD+25p
seg000:0303 C8 6E			ld	R12, word_86E
seg000:0305 D8 6F			ld	R13, word_86E+1
seg000:0307 A8 ED			ld	R10, R13
seg000:0309 02 DD			add	R13, R13
seg000:030B 10 EC			rlc	R12
seg000:030D 02 AD			add	R10, R13
seg000:030F 02 DD			add	R13, R13
seg000:0311 10 EC			rlc	R12
seg000:0313 04 ED 6F			add	word_86E+1, R13
seg000:0316 14 EC 6E			adc	word_86E, R12
seg000:0319 04 EA 6E			add	word_86E, R10
seg000:031C A0 6E			incw	word_86E
seg000:031E AF				ret	
seg000:031E		; End of function sub_303
seg000:031E		
seg000:031F		; ���������������������������������������������������������������������������
seg000:031F 76 10 10			tm	byte_810, #10h
seg000:0322 6B 10			jr	Z, loc_334
seg000:0324 D6 02 E7			call	sub_2E7
seg000:0327 09 43			ld	byte_843, R0
seg000:0329 20 43			inc	byte_843
seg000:032B 6B 07			jr	Z, loc_334
seg000:032D A8 E5			ld	R10, R5
seg000:032F 00 EA			dec	R10
seg000:0331 A4 43 EA			cp	R10, byte_843
seg000:0334		
seg000:0334		loc_334:				; CODE XREF: seg000:0322j
seg000:0334							; seg000:032Bj	...
seg000:0334 3D 00 AB			jp	ULE, loc_AB
seg000:0337 CC 08			ld	R12, #8
seg000:0339 DC 34			ld	R13, #34h
seg000:033B E6 00 A0			ld	p0, #-60h	; Port 0
seg000:033E E6 F8 16			ld	p01m, #16h	; Ports	0-1 mode
seg000:0341		
seg000:0341		loc_341:				; CODE XREF: seg000:0343j
seg000:0341 83 DE			ldei	@R13, @RR14
seg000:0343 CA FC			djnz	R12, loc_341
seg000:0345 E6 F8 1E			ld	p01m, #1Eh	; Ports	0-1 mode
seg000:0348 E6 00 E0			ld	p0, #-20h	; Port 0
seg000:034B 31 40			srp	#40h
seg000:034D E4 2E 3E			ld	byte_83E, byte_82E
seg000:0350 E4 2F 3F			ld	byte_83F, byte_82F
seg000:0353 56 34 0F			and	byte_834, #0Fh
seg000:0356 68 34			ld	R6, byte_834
seg000:0358 46 34 50			or	byte_834, #50h
seg000:035B E4 35 30			ld	byte_830, byte_835
seg000:035E 56 30 F0			and	byte_830, #-10h
seg000:0361 44 30 E6			or	R6, byte_830
seg000:0364 F0 E6			swap	R6
seg000:0366 6B CC			jr	Z, loc_334
seg000:0368 00 E6			dec	R6
seg000:036A 6B C8			jr	Z, loc_334
seg000:036C 78 35			ld	R7, byte_835
seg000:036E 56 E7 0F			and	R7, #0Fh
seg000:0371 0C 80			ld	R0, #80h
seg000:0373 DC 10			ld	R13, #10h
seg000:0375 E8 12			ld	R14, byte_812
seg000:0377 B0 EA			clr	R10
seg000:0379 B0 EB			clr	R11
seg000:037B B0 E8			clr	R8
seg000:037D E6 1F 01			ld	byte_81F, #1
seg000:0380		
seg000:0380		loc_380:				; CODE XREF: start+EEj
seg000:0380							; seg000:054Aj	...
seg000:0380 31 40			srp	#40h
seg000:0382 76 E0 80			tm	R0, #80h
seg000:0385 ED 03 9E			jp	NZ, loc_39E
seg000:0388		
seg000:0388		loc_388:				; CODE XREF: seg000:039Aj
seg000:0388							; seg000:03A5j
seg000:0388 9F				ei	
seg000:0389		
seg000:0389		loc_389:				; CODE XREF: seg000:038Cj
seg000:0389 76 F4 FF			tm	t0, #-1		; Timer/counter	0
seg000:038C EB FB			jr	NZ, loc_389
seg000:038E 42 88			or	R8, R8
seg000:0390 6B 0A			jr	Z, loc_39C
seg000:0392 8F				di	
seg000:0393		
seg000:0393		loc_393:				; CODE XREF: seg000:03D6j
seg000:0393 B0 F4			clr	t0		; Timer/counter	0
seg000:0395 00 E8			dec	R8
seg000:0397		
seg000:0397		loc_397:				; CODE XREF: seg000:03BDj
seg000:0397 46 F1 03			or	tmr, #3		; Timer	mode
seg000:039A 8B EC			jr	loc_388
seg000:039C		; ���������������������������������������������������������������������������
seg000:039C		
seg000:039C		loc_39C:				; CODE XREF: seg000:0390j
seg000:039C 0C 80			ld	R0, #80h
seg000:039E		
seg000:039E		loc_39E:				; CODE XREF: seg000:0385j
seg000:039E							; seg000:03A1j
seg000:039E 76 0A 04			tm	byte_8…

Showing first 20,000 characters of 54,608 total. Open the full document →

AppleNet PCB F.Jpg

Lisa · JPG

Filename	`AppleNet_PCB_f.jpg`
Size	0.44 MB
Subsection	appleNet
Downloads	4

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Image

Click to open at full size in a new tab.

341 0182.BIN

Lisa · MacBinary / raw

Filename	`341-0182.BIN`
Size	0.00 MB
Subsection	appleNet
Downloads	3

Download

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

About this file

This is a MacBinary / raw — a binary artifact that can't be previewed in the browser. MacBinary or raw binary — The Unarchiver handles the MacBinary variant.

341 0181.BIN

Lisa · MacBinary / raw

Filename	`341-0181.BIN`
Size	0.00 MB
Subsection	appleNet
Downloads	3

Download

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

About this file

This is a MacBinary / raw — a binary artifact that can't be previewed in the browser. MacBinary or raw binary — The Unarchiver handles the MacBinary variant.

Preliminary Applenet Interface Specification Jun81

Lisa · 1981 · PDF

Filename	`Preliminary_Applenet_Interface_Specification_Jun81.pdf`
Size	0.63 MB
Year	1981
Subsection	appleNet
Downloads	2

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Reader

Loading…

OCR / Text contents

APPLENET IF SPEC Preliminary APPLENET Interface Specification June 3, 1981 R. Hochsprung R. Paratore 6/3/81 page 1 APPLENET IF SPEC This specification is a first-cut at describing how the Lisa Host, interfaces with the APPLENET card to execute the basic network services provided by the Z8. Many details are left out, such as exact sizes of host queue elements, etc. since these are dynamiclly defined. This document should give the reader a basic sense of the "style" of interaction to be provided. The host sees the APPLENET card as a shared-memory device. All commands are initiated by setting parameters into a single Task Command Block (TCB) within this shared memory. Periodically, the Z8 performs a scan of. this TGB and will execute the command when it discovers it. After a command has been completed, the Z8 will generate an interrupt to the Host. At this time, the host is responsible to examine the results of the command. In addition, the APPLENET card is normally always armed to receive packets over the net. Data from received packets are placed wi thin buffers in the shared memory. Several such buffers (called Host Queue Elements - HQE) are maintained by the 28 after Initailization. As in the case of a completed command, the Z8 will interrupt the Host after each packet is successfully received. The term "queue" is somewhat misleading, since no explicit queuing mechanisms are provided. Instead, by mutual agreement between the Host and the Z8, these Host Queue Elements are scanned in a cyclic fashion. Thus, the Z8 will guarantee to fill the Host Queue in sequence (chronological order). Likewise, the Host should maintain such a cyclic sequencing when examining the queue. The only time when this "queue" will become full is when the Host does not free a HQE. The Z8 will consider the buffer overrun and Jam directed packets and increment the buffer overrun status on bradcast packets until the next HQE is free. In order to properly synchronize the shared usage of thes TCB) and HQEs (and long buffers), each such object contains a semaphore. The value of the semaphore always indicates the current state of the object. The interpretation of the semaphores is as follows: o A value of zero for any semaphore means that the object is currently free; ego neither the Z8 nor Host is using the object. + Any (strictly) positive value indicates that the object is being processed by the Z8. For the TCB, the value is set by the Host with a unique value indicating the desired command. For HQEs and long buffers, the value is set by the Z8 when the object is first allocated to begin reception of a new packet. - A negative value indicates that the object has been "completed" by the Z8 and should thus be processed by the Host. For the TCB, this indicates that the command is done. For HQEs, this indicates that a packet has been successfully received and should be processed by the Host. The following scenarios describe the sequence of semaphore values for two cases: …

Showing first 3,000 characters of 12,195 total. Open the full document →

Applenet Hardware Background And Current Status

Lisa · PDF

Filename	`Applenet_Hardware_Background_and_Current_Status.pdf`
Size	1.13 MB
Subsection	appleNet
Downloads	4

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Reader

Loading…

OCR / Text contents

Applenet Hardware: Background and Current Status CO NFID ENT1AL Authors: Bob Paratore/Jan Sheehan Preface This document presents the current status of and thoughts about the Applenet hardware. Chapter 1 explains local area computer networks, and Chapter 2 describes the current hardware design and implementation of Apple's version of a local network, Applenet. Chapter 3 ends the discussion of current thoughts and designs with an explanation of the personality module, a low-cost way of emulating certain devices. The last chapter of this document, Chapter 4, discusses what developments and user needs future versions of Applenet must consider. 1. Network Concept& ~omputer netw~rks connect computers and related resources together so that 'they can communicate with one another. Each se"parate connection to the communications" medium, called a node, att~ches one or "more computers and related resources to the network. Long-haul computer networks, such as ARPANET, connect computers that are more than a few miles apart; local area computer networks, such as Applenet, connect computers that are only a few thousand feet apart. Networks, whether local or long-haul, need to control how and when the connected computers sommunicate with one another. Networks control communication through choice of structure (topoiogy) and through rules (protocols) implemented in the system's hardware and software. The structure of a network defines how nodes are physically connected to one another. The system protocols are divided into sets of rules for each level of the communication process, and define the structure of packets, how and when a node can transmit or receive a message, and how the network and user software forms and interprets packets. Communication between nodes in a network is either circuit-switched or packet-switched. Circuit-switched networks dedicate a communication line for the duration of a communication. However, packet-switched networks do not dedicate a line. Instead, computers connected to packet-switched networks transmit packets, small envelopes of information. The advantage of packet switching is that many nodes can share the same communication line and transmit virtually simultaneously due to the short length and transmission time of the packet. Usually, local networks are packet-switched rather than circuit-switched. 1.1 Local Network Topologies Some local networks have centralized control. In these networks, one node receives and routes all messages. Common topologies for such networks are the loop and the star (see Figure 1-1). In a star network, all computers connect directly to the controller and send/receive messages only through the controller. In a loop network, the connections of the nodes form a circ~e. A message travels around the loop to the controller and the contrJller routes the message around the loop to its intended destination. These two topologies have one major disadvantage: their dependency on the controller node. …

Showing first 3,000 characters of 20,344 total. Open the full document →

Applenet Schematic

Lisa · PDF

Filename	`Applenet_Schematic.pdf`
Size	0.24 MB
Subsection	appleNet
Downloads	3

Download Open in browser

Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.

Reader

Loading…

OCR / Text contents

1 2 3 4 5 6 7 8 9 DATA_IN UE4_D0 INTn 3P4 3P0 RESET 0P6 UD1_OE 3P0 74LS32 UC6A UB2B 3 4 UB2C 5 74LS14 Cd 1 74LS14 14 DATA_IN 2 3 12 3 5 74LS00 4 UB3B J D2 74LS109 13 K 13 UE4 D3 9 Q 9 1 RESET Cp Mr 2 3 7 6 10 11 15 14 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 D1 12 GND Cp 14 5 Cp UF1B B 10 Q UB1B 12 CS1 6 74LS00 J D0 A11 INTn 1 2 3 4 5 6 7 8 9 10 0P4 2P7 3P2 0P5 3P1 74LS175 OD/CLK I0 I1 I2 I3 I4 I5 I6 I7 GND GND A 9 8 10 8 CS2 UC6B 74LS32 6 WE PAL20 FIFO_SL FIFO_SD DATA_OUT GND B 11 DS 10 UB5C 74LS08 UC6C 74LS32 JE5 20 19 18 17 16 15 14 13 12 11 VCC O0/LR O1/A0 O2/A1 O3/A2 A0/O0 A1/O1 A2/O2 LR/O3 CLK/OD STREAM ENCODER/DECODER 341-0180 9 3P0 10 Q Sd SHn DS 2 74LS109 UB5A 74LS08 8 VCC 4 15 CPUCK PLUP_13 UD1_OE 9 Q UB2D 9 74LS14 PLUP_14 UF4_CE 6 15 1 3 Sd 2 UB3A K XTAL2 12 12 3P5 1 13 UB2F 13 74LS14 Cd SHn PLUP_11 UE4_D0 11 11 A 10 4 DATA_IN UE3A 4 6 UE4_D0 UE3C BA10 74LS00 IAKn 9 D PLUP_12 8 O A9 74LS125 A0 A1 A2 A3 A4 A5 A6 A7 4 O BA12 E 2 D UF6A 9 D UF6C GND READ BA8 BA7 BA6 BA5 BA4 BA3 BA2 BA1 2 4 6 8 11 13 15 17 3P0 1 19 I0a I1a I2a I3a I0b I1b I2b I3b O0a O1a O2a O3a O0b O1b O2b O3b E UF3 OEa OEb 74LS374 A7 A6 A5 A4 A3 A2 A1 A0 18 16 14 12 9 7 5 3 A0 8 A1 7 A2 6 A3 5 A4 4 A5 3 A6 2 A7 1 A8 23 A9 22 A10 19 74LS244 VCC 31 32 33 34 35 36 37 38 39 40 41 42 BA1 BA2 BA3 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BA11 BA12 BA1 BA2 BA3 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BA11 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 SLn BA12 BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 SLn 18 16 14 12 9 7 5 3 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 9 10 11 13 14 15 16 17 OE 20 WE 21 CS1 18 Q0 A1 Q1 A2 Q2 A3 Q3 A4 Q4 ICD3 A5 Q5 A6 Q6 A7 Q7 A8 AS UD1_OE 1P0 1P1 11 1P2 13 1P3 14 1P4 15 1P5 16 1P6 17 1P7 1P0 1P1 1P2 1P3 1P4 1P5 1P6 1P7 LISA BOOT CODE ROM 341-0181 Vpp G E O0a O1a O2a O3a O0b O1b O2b O3b I0a I1a I2a I3a I0b I1b I2b I3b UF5 A0 8 A1 7 A2 6 A3 5 A4 4 A5 3 A6 2 A7 1 A8 23 A9 22 A10 19 2 4 6 8 11 13 15 17 RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 1 19 SLn 2 3 4 5 6 7 8 9 1P7 1P6 1P5 1P4 1P3 1P2 1P1 1P0 1 19 READ UF4_CE OE 20 WE 21 CS2 18 1 2 3 4 5 6 7 9 D0 D1 D2 D3 D4 D5 D6 D7 CE1 CE0 R/W A0 A1 INT SCN2653 UC2 FIFO_OE 15 14 13 12 11 10 74LS00 13 UB3D 12 WE 2 24 DS 12 74LS08 UB5D FIFO_PD 11 PLUP_14 E A0 Q0 A1 Q1 A2 Q2 A3 Q3 A4 Q4 ICD5 A5 Q5 A6 Q6 A7 Q7 A8 1P3 1P1 1P0 1P2 1P0 10 1P1 11 1P2 13 1P3 14 1P4 15 1P5 16 1P6 17 1P7 9 D0 D1 D2 D3 1 2 0P7 DS 6116 A9 14 13 12 11 Q0 Q1 Q2 Q3 Oe1 Oe2 9 10 7 OE 3 4 5 6 DS 2 3P6 4 J UB1A Cp 74LS109 DS 3 K 7 Q UC1 74LS173 E1 E2 Cp 15 FIFO_PL 6 Q 3P5 Mr A10 GND OE MCU RAM WE DS UB2E 11 DS 10 F 74LS14 CS A0 A1 A2 A3 A4 A5 A6 A7 UF4 A->B CE VCC RP1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 PLUP_15 PLUP_14 PLUP_13 PLUP_12 PLUP_11 PLUP_10…

Showing first 3,000 characters of 7,082 total. Open the full document →

Subscribe to appleNet