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CMD.Text

CMD.Text

Lisa · TEXT
FilenameCMD.Text
Size0.01 MB
Subsection firmware / ROM88
Downloads4
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Contents
.Page
;++
;
;			Cmd
;
; Cmd is the commmand interpreter; it looks at the Iob Gobyte and evaluates the
; command to be done.  If an interrupt is pending, '81' command will be
; aborted.  All commands are checked for the validity of their parameters by
; the "Validate" routine.
;
; REGISTERS
;	All =	Destroyed
;
; CALLS
;	Validate	Validates the parameters of the Iob
;	Rwts	Handles all commands related to the disk
;	Seek	Moves the heads to Drive/Side/Track
;	Call	Will call routine
;	ClrIst	Clears the Interrupt Status Bye
;	SetIMsk	Enables drives for interrupts using mask byte
;	ClrIMsk	Disables drives for interrupts using mask byte
;	WaitROM	Waits for particular GoByte sequence before Cold Restart
;	ESAD	Will only access ROM; loops forever on until reset
;++
.Page

;++
;	For x:=IobSize Downto 0 do		Transfer Iob into internal copy
;	   iiob,x := iob,x;
;	"A" reg will be left containing GoByte
;--
Cmd	.Equ *				; Entry point for Cmd
	Ldy	CmdX
	Ldx	#IobSize			; Move only the eight bytes that are passed
Cmd1	Lda	Iob,x			; Fetch
	Sta	IIob,x			; And deposit
	Sta	@SaveL,y			; for posterity
	Dey
	Dex				; Count down
	Bpl	Cmd1

	Sty	Cmdx
	Iny
	Bne	$32
	Ldy	#CmdLeng
	Sty	CmdX

;	If IIob.Gobyte = 81 then
;	   Goto Rwts

$32	Cmp	#RwtsCmd			; Rwts command?
Beq	Rwts				; Yes & let Rts from Rwts return to Loop

;	Else
;	Begin
;	   In not (IIob.GoByte in [Valid IIob.GoByte]) then
;	   begin
;	      Iob.GoByte := 001;		Invalid command
;               Carry := Clear		Command completed
;	      Return
;	   end;
;	Validate

	Cmp	#NullCmd			; If null command then exit
	Beq	CmdNoErr

	Sec
	Sbc	#LwCmdNo			; Subtract lowest command number
	Bcc	Cmd3			; Oooops!  Not a valid GoByte command
	Cmp	#CmdNumb+1		; Number of commands in range
	Bcc	Cmd5			; Skip if valid GoByte command
Cmd3	Lda	#GErrCmd			; Else signal invalid GoByte
	Bne	CmdClnUp			; Cleanup & exit

Cmd5	Tax				; Index to command already in A-reg!
	Sta	HoldInx			; Save index fro the moment
	Lda	TestGoB,x			; Fetch Parsing for GoByte Commands
	Jsr	Validate			; And validate it
	Bcs	CmdClnUp			; Not a valid command
	Lda	HoldInx			; Get back the index to the command

;	If Valid then
;	case GoByte of
;	83:	Seek			Seek to track
;	84:	Call			Call 6504 address
;	85:	ClrIst			Clear Ist (Interrupt Status) bits
;	86:	SetIMsk			Set (enable) bits in IMsk (Interrupt Mask)
;	87:	ClrIMsk			Clear (disable) bits in Imsk (Interrupt Mask)
;	88:	WaitRom			Wait in Rom (used by 68K ram test)
;	89:	ESAD			Jump to self in Rom and never return
;	End; {case}
;	End;

	Asl	A			; To index into word table
	Tax				; Use command number as index
	Jsr	Cmd6
	Lda	HoldInx			; Fetch the index (0..6)
	Beq	CmdRts			; Skip if comand was a "Seek" command
	Cmp	#01			; Also skip if it was a "Call" command
	Beq	CmdRts
CmdNoErr	.Equ *
	Lda	#0			; Signal no error

CmdClnUp	Sta	Iob+ErrStat		; Common error reporting code for Cmd and Rwts
	Lda	#00
	Sta	Iob+GoByte		; Allow host to process error (if any)

CmdRts	Rts				; And exit

;--
;
;	Cmd Jump Table Dispatcher
;

Cmd6	Lda	CmdJmp+1,x		; Fetch th ehigh byte
	Pha				; Put it on the stack
	Lda	CmdJmp,x			; Then the low byte
	Pha
	Rts				; and jump indirect top of stack

CmdJmp	.Word	Seek-1,Call-1,ClrIst-1,SetIMsk-1,ClrIMsk-1
	.Word	WaitRom-1,ESAD-1

.Page
;++
;
;		Rwts
;
; Rwts (Read Write Track Sector) is the routine that parses and dispatches
; all commands that affect the disk ( except Seek).  If no interrupts are
; pending and all parameters are valid, then the memory will be disabled to
; access by the 68K and the proper routine will be called.
;
; REGISTER
;  IN
;	A =	IIob+GoByte
;
;  OUT
;	All ==	Destroyed
;
; CALLS
;	Validate	Validates parameters for Cmd, driven by TestTbl
;	Init	Set up Global conditions used by most commands
;	Read	Reads Drive/Side/Track/Sector
;	Write	Writes Drive/Side/Track/Sector
;	Unclamp	Unclamps the disk in Drive
;	Format	Formats the disk in Drive starting at Side/Track
;	Verify	Reads the disk in Drive starting at Side/Track
;	FormTrack	Formats single Track on Disk in Drive
;	VerTrack	Read single Track on Disk in Drive
;	ReadBF	Read Drive/Side/Track/Sector w/o checksum verify
;	WriteBF	Writes Drive/Side/Track/Sector w/o checksum creation
;	ClpEnty	Will clamp disk in drive
;
;++
.Page

Rwts	.Equ *				; Entry point for Rwts

;	Validate IIob.Command;
;	if not valid then
;	begin
;	   Iob.GoByte := Command error
;	   Carry := Clear
;	   return from Rwts
;	end
;	Validate;
;	if not valid then return from rwts
;	else
;	begin
;	   lock memory
;	   init
;	   call command
;	   Ist := R/W command done
;	   UpdInt
;	end
;	end
;	return from rwts
;++

	Lda	OkToGo			; If <> 0 then interrupt is pending
	Beq	AOk
	Lda	#GeErrIntr		; Pending interrupt error
NotAOk	Jsr	CmdClnUp			; Report error
	Beq	Rw400			; Send an interrupt back to host

AOk	Ldx	IIob+Command		; Fetch the command number
	Cpx	#MaxCmd+1			; compare against maximum command
	Bcc	Rwts4			; Skip if valid
	Lda	#GeErrCmd			; Signal a command error
	Bne	NotAOk			; Local error exit handler

Rwts4	Lda	TestTbl,X			; Fetch bit mask of parameters to check
	Jsr	Validate			; Validate return carry clear if OK
	Jsr	CmdClnUp			; Will clear GoByte and return error code
	Bcs	Rw400			; If error the return FDirH

Rwts40	Jsr	Init			; Set up global conditions used by most commands
	Lda	IIob+Command		; Load with command byte
	Asl	A			; Mult by two to address word entry
	Tax				; Put into index register
	Jsr	Rwts7			; Push return address on stack and execute cmd

	Sta	DisL			; Unlock memory
	Sta	BootH			; Tell 68K that memory is available
	Bcc	Rwts5			; If carry clear then no error
	Sta	Iob+ErrStat		; If error then report this to host

Rw400	.Equ *
	Ldy	CmdX			; And save for posterity
	Cpy	#CmdLeng
	Bne	$10
	Ldy	#6
	Bne	$20
$10	Tya
	Clc
	Adc	#7			; Point at "Speed" byte
	Tay
$20	Lda	Iob+ErrStat
	Sta	@SaveL,y

Rwts5	Lda	#040			; Use drive 80
	Ora	Ist			; Set bit in interrupt status
	Sta	Ist
	Jmp	UpdInt

;--
;
;		Rwts command dispatcher

Rwts7	Lda	RwtsJmp+1,x		; Fetch the high byte of the routine
	Pha				; Push it
	Lda	RwtsJmp,x			; Fetch the low byte of the address
	Pha				; Push it to the stack
	Sta	BootL			; Tell the 68K that memory is disabled
	Sta	DisH			; Disable address al last possible moment
	Rts				; Pop address and jump to it

RwtsJmp	.Word	Read-1,Write-1,UnClamp-1
	.Word	Format-1,Verify-1,FormTrak-1,VerTrack-1
	.Word	ReadBF-1,WriteBf-1,ClpEnty-1

.Page
;++
;
;			Validate
;
; Validates the Iob parameters passed from the 68K depending on the
; bit pattern in the A-reg.
;
; REGISTERS
;  IN
;	A =	Parameters in the Iob to be tested:
;
;	Bit	Contents
;	---	--------
;	0 (LSb)	Drive and a clamped disk
;	1	Side #
;	2	Sector #
;	3	Track #
;	4	Mask
;	5	Confirmation byte
;	6	Write Protection
;	7 (MSb)	Format/Verify parameters
;
;	X =	Any value
;	Y =	Any value
;
;  OUT
;	A =	Destroyed
;	X =	Destroyed
;	Y =	Destroyed
;
; CALLS
;	EnblTest	Test for drive being enabled for interrupts
;	TrkClss	Returns w/ "Y" = class of Track
;	ReadDWP	Tests for write protected disk
;---
.Page

Validate	.Equ *				; Entry point for validate
	Sta	Temp1			; Save "A" here during validation
	Beq	VldNoTst			; If zero then no testing required
	Ldx	#0E			; Test bits 7-0, use 14. to index word array
Valid1	Lsr	Temp1			; Shift and test the carry bit
	Bcc	Valid20			; Bit not set; skip this test
	Stx	Temp2			; Save the "X" couinter value
	Lda	ValJmp+1,x		; Pick up the high byte
	Pha				; Put it on the stack
	Lda	ValJmp,x			; Pick up the low byte
	Pha				; Put it too on the stack
	Rts				; Jmp to the test

; This is the return point after a successful test

Valid2	Ldx	Temp2			; Restore "X" counter value
Valid20	Dex				; Loop count -2 = next test address index
	Dex
	Bpl	Valid1			; Will loop until index is negative
VldNoTst	Lda	#0
	Clc				; Signal no errors
	Rts

; This the return point after a failed test

Valid3	Sec				; Something went wrong
	Rts

;--
;
;		Test drive number, if the drive is enabled and for a clamped disk

ValidDr	Lda	IIob+Drive
	Cmp	#80			; Must use 'Lower' drive value
	Bne	$28
	Lda	Clamped
	Bne	$57			; Yes, there is a clamped disk
$28	Lda	#GeErrClm			; No disk in drive error
	Bne	$57			; Always taken

$57	Jsr	EnblTest			; Test if the drive is enabled
	Bcs	Valid2			; Yes, the drive is enabled
	Lda	#GeErrNA			; Drive not enabled
	Bne	Valid3			; Always taken

;--
;
;		Test side number

ValidSI	Lda	#GeErrSid			; Assume error
	Ldy	IIob+Side
	Beq	Valid2			; side 0 is always good
	Cpy	#01			; now see if side 1
	Bne	Valid3			; Not side 1 either
	Ldy	#02
	Cpy	Iob+NoSides		; Will range from 0 to 2 -- must be 2 for dual sided
	Bne	Valid3			; Not a dual sided drive
	Beq	Valid2

;--
;
;		Test sector number

ValidSe	Jsr	TrkClss			; Find track class
	Lda	IIob+Sector		; New sector number
	Cmp	SecPrTrk,y		; Compare against max sectors per track class
	Bcc	Valid2			; Ok, within limits
	Lda	#GeErrSec			; Oops, to many
	Bne	Valid3			; Always taken

;--
;
;		Test track number

ValidTr	Lda	IIob+Track		; Fetch the track
	Cmp	#MaxTrack+1		; And test against the maximum track number
	Bcc	Valid2			; Ok, nothing wrong so far
	Lda	#GeErrTrk			; Track number i too high, signal error
	Bne	Valid3			; Always taken

;--
;
;		Test mask

ValidCF	Inc	Iob+FmtCnfM		; If correct byte, this will inc to zero
	Beq	Valid2			; Ok, byte was = FF
	Lda	#GeErrFmPr		; Wrong byte
	Bne	Valid3			; Always taken

;--
;
;		Test for write protection

ValidWP	Jsr	ReadWP			; Test for a write protected disk
	Bcs	Valid2			; Carry = 1 ==> not protected
	Lda	#SErrProt			; Write protection error constant
	Bne	Valid3			; Always taken

;--
;
;		Test for format and verify parameters

ValidFV	Lda	IIob+Track
	Ora	IIob+Side			; Must have Trk/Side = 0
	Beq	Valid2			; Params are Ok-continue
	Lda	#GeErrFmPr		; Track/Side <> 0 error
	Bne	Valid3			; Always taken

;--
;
; Validation jump table
;	Table must be in this order -- Drive must be validated and selected
;	prior to checking for write protection

ValJmp	.Word	ValidFV-1,ValidWP-1,ValidCF-1,ValidMA-1,ValidTr-1
	.Word	ValidSe-1,ValidSi-1,ValidDr-1

.Page
;++
;
;		EnblTest
;
; Test IMsk against X-reg to find out if the drive indexed by x is enabled.
;
;--
;
; REGISTERS
;  IN
;	A =	Any Value
;	X =	=0, Drive 0; =2, Drive 80
;	Y =	Any value
;  OUT
;	A=	Destroyed
;	X =	Unchanged
;	Y =	Unchanged
;	Carry =	=Clear, drive not enabled; =Set drive enabled
;
;--

EnblTest	.Equ *				; Entry point for EnblTest

	Lda	#080			; Drive 80
EnblTst1	And	IMsk			; Test against interrupt mask
	Adc	#0F8			; Cause overflow if 008 or larger
	Rts

.Page
;++
;
;		Init
;
; Set up global conditions used by most Rwts commands
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;
;  OUT
;	A =	Destroyed
;	X =	Destroyed
;	Y =	Unchanged
;
;++
;
;	RetryCnt := MaxRetry;
;	RecalCnt := MaxRecal;
;	Error counters := 0;

Init	.Equ *				; Entry point for Init
	Lda	MaxRetry
	Sta	RetryCnt
	Lda	MaxRecal
	Sta	RecalCnt
	Lda	MaxDDly			; Motor off delay time
	Sta	WthHih
	Lda	IIob+Side
	Beq	$09
	Lda	#20			; If side 1 then set only bit 5
	Sta	IIob+Side
$09	Lda	#00
	Sta	WtLow			; Reset 3 byte counter
	Sta	WtMid
	Sta	RtyFlg			; When = 2 then abort read or write operation
	Ldx	#ErrLen			; Number of error counters
$12	Sta	StSlp,x			; Zero the counter
	Dex
	Bpl	$12			; Zero based index
	Rts

.Page
;++
;
;		Call
;
; Calls a routine in the Rom or Ram as specified by the address in AdrL, AdrH.
; This is mostly used by diagnostics.  You can always return from the call by
; Executing an Rts.
;
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;
;  OUT
;	A =	Destroyed
;	X =	Destroyed
;	Y =	Destroyed
;
;++

; First make sure that the motors are off
;  then jump off into the blue

Call	.Equ *				; Entry point for call
	Jsr	PrkClr0			; Park heads, turn off motors & clear GoByte
	Jmp	@IIob+Adrl		; Jump indirect on the address in the IIob

.Page

;++
;
;		ClrIst
;
; Clears selected bits in the Ist (Interrupt Status) and then checks if FDir
; should still be high. Mask should contain a 1 for the bits in Ist to
; be switched off
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  OUT
;	A =	Destroyed
;	X =	Unchanged
;	Y =	Unchanged
;
; CALLS
;	UpdInt	Updates FDir depending in Ist
;
;++

ClrIst	.Equ *				; Entry point for ClrIst
	Lda	IIob+Mask			; Fetch the mask
	Eor	#0FF			; Ones complement
	And	Ist			; And with Ist to switch off selected bits
	Sta	Ist			; Save new Ist
ClrExit	Jmp	UpdInt			; Calculate new status of FDir

.Page

;++
;
;		SetIMsk
;
; Sets (Enables) the interrupt mask fro drive 0 and drive 80 and computes the
; new status if FDir.
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  OUT
;	A =	Destroyed
;	X =	Unchanged
;	Y =	Unchanged
;
; CALLS
;	UpdInt	Update FDir status
;
;	Imsk := $88
;	Call UpdInt -- will return from UpdInt to caller
;++

SetImsk	.Equ *				; Entry point for SetIMsk
	Lda	IIob+Mask
	Ora	IMsk
	Sta	IMsk			; Save the new IMsk value
	Jmp	UpdInt			; Calculate the new status of FDir

.Page
;++
;
;		ClrImsk
;
; Clears (Disables) then IMsk (Interrupt Status) selectivly.  Computes new status
; of the FDir.
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  OUT
;	A =	Destroyed
;	X =	Unchanged
;	Y =	Unchanged
;
; CALLS
;	UpdInt	Update FDir
;
;	Call UpdInt -- Will return from UpdInt to caller
;++

ClrIMsk	.Equ *				; Entry point for ClrIMsk
	Lda	IIob+Mask
	Eor	#0FF
	And	IMsk
	Sta	IMsk			; Save new IMsk value
	Jmp	UpdInt			; Calculate new status of FDir
Home Documents Lisa Lisa Boot ROM RM248.S.TEXT
Lisa Boot ROM RM248.S.TEXT

Lisa Boot ROM RM248.S.TEXT

Lisa · TEXT
FilenameLisa_Boot_ROM_RM248.S.TEXT
Size0.07 MB
Subsection firmware
Downloads3
Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.
Contents
.PAGE
;----------------------------------------------------------------------------
;  VIDEO CIRCUITRY TEST
;  The following test checks the vertical retrace signal of the
;  video circuitry to verify it is toggling.
;  Register usage:
;       D0 = timeout count      A0 = unused
;       D1 = unused	        A1 = unused
;       D2 = bit pointer        A2 = unused
;       D3 = unused	        A3 = address to disable VTIR
;       D4 = unused	        A4 = address to enable VTIR
;       D5 = unused	        A5 = address of bus status register
;----------------------------------------------------------------------------

VIDTST
        .IF     ROM4K = 0

        .IF  USERINT = 1
        BSR     MAKETEST        ;display test icons
        MOVEA   #CPUSTRT,A1     ;hilite CPU board icon
        BSR     INVICON
        .ENDC
VIDCHK
        MOVEA.L #VTIRDIS,A3     ;ADDRESS FOR DISABLING VTIR
        MOVEA.L #VTIRENB,A4     ;ADDRESS FOR VTIR ENABLE
        MOVEA.L #STATREG,A5     ;STATUS REGISTER LOCATION FOR BYTE OPS

        MOVE    #$0DF4,D0       ;SET TIMEOUT COUNT FOR ABOUT 20 MS
        MOVEQ   #VRBIT,D2       ;VR BIT LOCATION

        TST     (A3)	        ;RESET THEN
        TST     (A4)	        ; ENABLE VTIR
@1      BTST    D2,(A5)	        ;WAIT FOR LOW
        BEQ.S   @2	        ;EXIT IF YES
        DBF     D0,@1	        ;ELSE LOOP (ABOUT 5.6 MS PER LOOP)
        BRA.S   VIDERR	        ;AND SET ERROR IF TIMEOUT

@2      TST     (A3)	        ;RESET VTIR
        TST     (A4)	        ;THEN RENABLE
        BTST    D2,(A5)	        ;SHOULD BE HIGH BY NOW
        BEQ.S   VIDERR	        ;GO TO ERROR EXIT IF NOT
        TST     (A3)	        ;DISABLE VTIR
        BRA.S   VIDXIT	        ;and go to exit

;  Error exit

VIDERR  BSET    #VID,D7	        ;SET ERROR INDICATOR
        TST.L   D7	        ;in loop mode?
        BMI.S   VIDCHK	        ;restart test if yes
        BRA     TSTCHK	        ;else go to error msg routine

;  Normal exit

VIDXIT

;----------------------------------------------------------------------------
;  Now, try reading of system serial number
;----------------------------------------------------------------------------

        MOVEA   #SERNUM,A0      ;ptr for save of serial #
        BSR.S   RDSERN	        ;go do read
        BCC.S   VIDERR	        ;exit if error
        TST     VTIRDIS	        ;else disable vertical retrace
        TST.L   D7	        ;check for loop mode
        BMI.S   VIDCHK	        ;if not, fall thru to next test
        BRA     PARTST	        ;and go on to next test

        .PAGE
;--------------------------------------------------------------------------
;
;  Routine to read system serial # from video prom.
;  Written by Ken Schmal and Ron Hochsprung.
;
;       Register Usage:
;
;       temporary and iterative			 D0
;       temporary and iterative			 D1
;       temporary and iterative			 D2
;       temporary and iterative			 D3
;       boolean FOUND to be returned		 D4
;       pointer to save area for serial #	 A0
;       SN1 & SN2 pointer			 A1
;       STATUS REGISTER pointer			 A2
;       SCRACH array pointer			 A3
;       SCRACH END pointer			 A4
;       Tag const				 A5
;       static link and stack frame
;	  base pointer register			 A6
;
;  Returns with carry bit set if all OK.
;  All registers except D7 and A0 trashed.
;
;--------------------------------------------------------------------------

RDSERN

        MOVEM.L	        D7/A0,-(SP)	        ;save regs

;       turn off all interrupts

        move	        SR, -(sp)	        ;save the present status register
        ori.w	        #$0700, SR	        ;set interrupt to level 7

;--------------------------------------------------------------------------
;       now set up registers for the algorithm
;--------------------------------------------------------------------------

        move.l	        #Snum, a1	        ;location in MMU of SN1 & SN2
        move.l	        #Statreg,a2	        ;Status Register pointer
        link	        a6, #dStack	        ;make room for SCRACH
        lea	        dScrach(a6), a3	        ;get pointer for SCRACH
        lea	        Tag,a4
        move.l	        a0,dSavArry(a6)

;--------------------------------------------------------------------------
;       first we get the block out of the vertical half
;--------------------------------------------------------------------------
;
;       sync up to the vertical retrace bit
;

GetBits1:

        moveq	        #2, d1		        ;vertical retrace is bit #2
        move.l	        #BytesPerRead,dLcnt(a6) ;read this many bytes
        clr	        VTIRDIS		        ;clear vertical retrace bit
        clr	        VTIRENB		        ;set vertical retrace interrupt
@1:     btst	        d1, (a2)	        ;wait until it's true
        bne.s	        @1

;
;------ read the first block ------
;

@3:     movem	        (a1), d0-d7
        movem	        d0-d7, (a3)
        addq.l	        #8, a3
        addq.l	        #8, a3
        nop
        moveq	        #dlycnst-1, d0
        subq.l	        #1, dLcnt(a6)
@4:     dble	        d0, @4
        bgt.s	        @3

;--------------------------------------------------------------------------
;       then we get the block out of the horizontal half
;--------------------------------------------------------------------------
;
;       kill time until we're near the last vertical retrace line
;

GetBits2:

        move.l	        #BytesPerRead, dLcnt(a6);get the last few bytes
        move.w	        #TKiller-1, d0	        ;time killer constant
@1:     dbra	        d0, @1		        ;loop

;
;------ read the second or last block ------
;

@2:     movem	        (a1), d0-d7
        movem	        d0-d7, (a3)
        addq.l	        #8, a3
        addq.l	        #8, a3
        nop
        moveq	        #dlycnst-1, d0
        subq.l	        #1, dLcnt(a6)
@3:     dble	        d0, @3
        bgt.s	        @2

;--------------------------------------------------------------------------
;       now we have to find sync bytes and extract the bit stream
;--------------------------------------------------------------------------

        clr	        VTIRDIS		        ;turn off vertical retrace
        moveq	        #1, d4		        ;initialize FOUND to true

GetBytes:
        lea	        dScrach(a6), a3	        ;pointer to 1/2 Scrach Array pointer
        move.l	        a3, a4
        adda	        #HalfSize, a4	        ;pointer to end of 1/2 Scrach Array     RM000
;
;       find the first sync byte
;
        bsr	        FindSync
        tst.w	        d4
        beq.s	        Exit		        ;exit if no sync byte found
;
;       now pull out the first block from the bit stream
;
        bsr	        GetNibbles
;
;       here we look for the second sync byte.
;
        lea	        dScrach(a6), a3
        adda	        #HalfSize, a3	        ;pointer to 2/2 Scrach Array pointer    RM000
        move.l	        a3,a4
        adda	        #HalfSize,a4	        ;pointer to end of 2/2 Scrach Array     RM000
;
        bsr	        FindSync
        tst.w	        d4
        beq.s	        Exit		        ;again, exit if no sync byte found
;
;       now pull out second block from the bit stream
;
        bsr	        GetNibbles

;----------------------------------------------------------------------
;       Check the checksum of the read data
;----------------------------------------------------------------------

CheckSum:
        move.l	        dSavArry(a6),a0
        clr.w	        d0

        move.b	        24(a0),d0
        move.w	        #100,d2
        mulu	        d2,d0

        move.b	        25(a0),d1
        move.w	        #10,d2
        mulu	        d2,d1
        add.w	        d1,d0

        move.b	        26(a0),d1
        add.w	        d1,d0

        clr.w	        d1
        clr.w	        d2
        clr.w	        d3
@2:     move.b	        0(a0,d1),d3
        add.w	        d3,d2
        addq.w	        #1,d1
        cmpi.w	        #24,d1
        bne.s	        @2

        move.b	        27(a0), d3
        add.w	        d3,d2
        subi.w	        #4 * $F, d2
        cmp.w	        d0,d2
        beq.s	        @3
        clr.w	        d4
@3:

;---------------------------------------------------------------------------
;       job well done, lets go home
;---------------------------------------------------------------------------

Exit:
        unlk	        a6
        move	        (sp)+, SR	        ;restore status reg
        MOVEM.L	        (SP)+,D7/A0	        ;and regs
        clr	        VTIRENB		        ;re-enable interrupts
        LSR	        #1,D4		        ;shift to set/reset error indicator
@1      RTS				        ; and exit

        .PAGE
;---------------------------------------------------------------------------
;       subroutine to find a sync byte
;---------------------------------------------------------------------------

FindSync:
        clr.l	        d0
        moveq	        #2, d1		        ;two passes to find the sync byte
@1:     move.w	        (a3)+, d2	        ;
        lsl.w	        #1, d2		        ;
        roxl.b	        #1, d0		        ;get SN1
        cmpa.l	        a3, a4		        ;assure the buffer's circular
        bne.s	        @2		        ;
        adda.l	        #-HalfSize, a3	        ;if it's at the end then
        subq	        #1, d1		        ; check if it's the second try
        beq.s	        @3		        ; and exit if so
@2:     cmpi.b	        #$0ff, d0	        ;test here if it's a sync byte
        bne.s	        @1		        ;no: loop again
        lsl.w	        #4, d0		        ;yes: adjust the byte
        lsr.b	        #4, d0		        ;
        move.w	        d0, (a0)+	        ;save it
        rts				        ;and return

@3:     clr.w	        d4		        ;uh, oh. No sync byte.
        rts				        ;clear FOUND and return

;--------------------------------------------------------------------------
;       subroutine to pull out a 14 nibble block from the bit stream
;--------------------------------------------------------------------------

GetNibbles:
        moveq	        #BytesPerRead-1, d2     ;
@1:     moveq	        #8, d1		        ;8 bits/byte
        clr.l	        d0		        ;
@2:     lsl	        (a3)+		        ;get SN1 in the next scrach word
        roxl.b	        #1, d0		        ;shift it into the save buffer
        cmpa.l	        a3, a4		        ;assure a circular bufer
        bne.s	        @3		        ;
        adda.l	        #-HalfSize, a3	        ;
@3      subq	        #1, d1		        ;decrement bit/byte counter
        bne.s	        @2		        ;loop again if still in byte
        lsl.w	        #4, d0		        ;separate the nibbles
        lsr.b	        #4, d0		        ;
        move	        d0, (a0)+	        ;save these nibbles
        subq	        #1, d2		        ;decrement byte/SN counter
        bne.s	        @1		        ;loop again if still more to go
        rts

Tag     .word	        $4b41,$5300


        .PAGE
;----------------------------------------------------------------------------
;  PARITY CIRCUITRY TEST
;  The purpose of this test is to verify the operation of the parity checking
;  logic by forcing a parity error and ensuring it is caught.
;  Register usage:
;       D0 = pattern written	        A0 = logical address used for test
;       D1 = read results	        A1 = corresponding physical address
;       D2 = NMI indicator	        A2 = save for NMI vector
;       D3 = save of memory contents    A3 = scratch
;       D4 = save of error addr latch   A4 = unused
;       D5 = unused		        A5 = address of bus status register
;       D6 = unused		        A6 = unused
;----------------------------------------------------------------------------

PARTST
        .ENDC
        .IF  ROM16K = 1

        MOVE.L  NMIVCT,A2       ;SAVE STANDARD NMI VECTOR
        LEA     WWPERR,A3       ;THEN SET UP NEW PARITY ERROR (NMI) VECTOR
        MOVE.L  A3,NMIVCT
        MOVEA.L #STATREG,A5     ;setup status reg ptr for byte ops
        TST.B   PAROFF	        ;disable parity initially
        CLR.L   D2	        ;clear regs for result use
        CLR.L   D4
        MOVE    #$01FF,D0       ;SET UP PATTERN FOR WRITE
        MOVEA   #$300,A0        ;SET UP ADDRESS FOR USE (in already verified mem)       RM000
        MOVE    (A0),D3	        ;SAVE ITS CONTENTS
        MOVEA.L A0,A1	        ;COMPUTE CORRESPONDING
        ADDA.L  MINMEM,A1       ; PHYSICAL ADDRESS

        TST.B   DG2ON	        ;ENABLE WRITE WRONG PARITY FUNCTION
        MOVE    D0,(A0)	        ;DO WRITE TO CREATE BAD PARITY
        TST.B   DG2OFF	        ;DISABLE WWP

        TST.B   PARON	        ;ENABLE PARITY ERROR DETECTION
        TST     D2	        ;SHOULDN'T HAVE INTERRUPT YET
        BNE.S   PARERR	        ;EXIT IF ERROR

        MOVE    (A0),D1	        ;DO READ - PARITY ERROR SHOULD OCCUR
        NOP		        ;GIVE A LITTLE EXTRA TIME
        TST     D2	        ;NMI RECEIVED?
        BEQ.S   PARERR	        ;ERROR IF NO

;  Check that parity error and failing address correctly caught

        BTST    #PBIT,(A5)      ;PARITY ERROR BIT SET?
        BNE.S   PARERR	        ;EXIT IF NOT
        MOVE    MEALTCH,D4      ;GET ERROR ADDRESS
        TST.B   PAROFF	        ;disable parity to clear error bit
        LSL.L   #5,D4	        ;NORMALIZE THE ADDRESS
        CMPA.L  D4,A1	        ;SAME ADDRESS AS WRITTEN TO?
        BNE.S   PARERR	        ;EXIT IF ERROR
        MOVE.L  A2,NMIVCT       ;ELSE RESTORE NMI VECTOR
        CLR     D0
        NOT     D0
        MOVE    D0,(A0)	        ;"clear" bad parity
        TST.B   PARON	        ;reenable parity
        BRA.S   PARXIT	        ;and skip to exit

;  Error exit

PARERR  BSET    #PAR,D7	        ;SET INDICATOR
        TST.L   D7	        ;in loop mode?
        BMI.S   PARTST	        ;restart if yes
        TST.B   PAROFF	        ;else ensure parity disabled
        MOVE.L  A2,NMIVCT       ;RESTORE NMI VECTOR
        BRA     TSTCHK	        ;AND ABORT FURTHER TESTING

;  Normal exit

PARXIT  TST.L   D7	        ;check for loop mode
        BMI.S   PARTST	        ;restart test if yes
        BSR     CHKCPU	        ;place check over CPU (all tests OK)
        BRA.S   MEMTST2	        ;else go do memory test

;  NMI routine for parity error checking

WWPERR  MOVEQ   #1,D2	        ;SET INDICATOR
        RTE		        ;AND RETURN

;------------------------------------------------------------------------
;  Bus error handler for VIA #1 use
;------------------------------------------------------------------------

VIA1VCT MOVEQ   #EVIA1,D0       ;SET ERROR CODE
        BSET    #VIA1,D7        ;set indicator
        BRA     IOVCT	        ;AND GO HANDLE I/O EXCEPTION

        .ENDC		        ;(ROM16K)
        .PAGE
;-------------------------------------------------------------------------
;  Now do full memory test with and without parity enabled.  If parameter
;  memory bit set for extended memory testing, memory tests executed in
;  twice.  If warm-start, execute only one pass with parity enabled.
;  Uses registers:
;       A0 = starting address to test   D0 = used to consolidate test results
;       A1 = ending address to test     D1 = scratch
;       A2 = unused		        D2 = address increment
;       A3 = save address for results   D3 = test results for each 128K
;       A4 = return address	        D4 = max test address
;       A5 = unused		        D5 = pass count
;-------------------------------------------------------------------------

MEMTST2
        .IF  ROM4K = 0

        .IF  USERINT = 1
        MOVEA   #MEMSTRT,A1     ;hilite memory board test icon
        BSR     INVICON
        .ENDC

        BSR     SETBUSVCT       ;restore normal bus error vector	        RM000
MEMLOOP
        LEA     PRTYINT1,A1     ;setup up vector for parity intrpt	        CHG015
        MOVE.L  A1,NMIVCT       ;					        CHG015

        .IF  ROM16K = 1
;  First check if this is a warm-start					        CHG006

        BTST    #WRMSTRT,D7     ;warm-start?				        CHG006
        BEQ.S   @0	        ;skip if not				        CHG015
        MOVEQ   #1,D5	        ;else set count for one pass		        CHG015
        BRA.S   @3	        ;skip to do it				        CHG015

;  Next check parameter memory to see if extended testing desired

@0      BSR     CHKPM	        ;go check parameter memory
        BCS.S   @1	        ;skip if not valid to do only one pass
        BTST    #6,MEMCODE      ;else check extended memory test indicator
        BEQ.S   @1	        ;exit if not set

        MOVEQ   #2,D5	        ;run two passes for extended mode	        CHG015
        BRA.S   @2	        ;go do it				        CHG015
@1      MOVEQ   #1,D5	        ;run one pass for normal mode		        CHG015

;  Run the memory tests

@2      TST.B   PAROFF	        ;first run with parity off		        CHG015
        BSR.S   RUNTESTS        ;run test pass				        CHG015
        BNE.S   TSTDONE	        ;skip if error				        CHG015
@3      TST.B   PARON	        ;then run pass with parity on		        CHG015
        BSR.S   RUNTESTS        ;run test pass				        CHG015
        BNE.S   TSTDONE	        ;exit if error				        CHG015
        SUBQ    #1,D5	        ;decr pass count			        CHG015
        BNE.S   @2	        ;continue testing until done		        CHG015

TSTDONE TST.L   D7	        ;in loop mode?
        BMI.S   MEMLOOP	        ;restart if yes
        BTST    #MEM,D7	        ;memory error?
        BNE     TSTCHK	        ;abort if yes
        BSR     CHKMBRD	        ;else signal memory OK
        LEA     NMI,A3	        ;restore NMI vector			        CHG015
        MOVE.L  A3,NMIVCT       ;					        CHG015
        BRA     IOTST	        ;go on to next test


;-----------------------------------------------------------------------
;  Subroutine to run the memory tests - saves results as test proceeds
;  Zero condition code bit set if no errors.
;-----------------------------------------------------------------------

RUNTESTS

;  Do the basic test

BASICTST
        BSR.S   TSTINIT	        ;init for new test
CALL3
        BSR4    RAMTEST
        BEQ.S   @1	        ;skip if no errors
        BSET    #MEM,D7	        ;else set error indicator
@1      BSR.S   SAVRSLT	        ;save results
        BNE.S   CALL3	        ;loop until done			        CHG021
        BTST    #MEM,D7	        ;set condition code			        CHG015
        RTS		        ;and exit

        .ELSE

        TST.B   PARON	        ;enable parity...

;  Do the basic test

BASICTST
        BSR.S   TSTINIT	        ;init for new test
CALL3
        BSR4    RAMTEST
        BEQ.S   @1	        ;skip if no errors
        BSET    #MEM,D7	        ;else set error indicator
@1      BSR.S   SAVRSLT	        ;save results
        BCC.S   CALL3	        ;and loop until done

TSTDONE LEA     NMI,A3	        ;restore normal NMI vector
        MOVE.L  A3,NMIVCT
        TST.L   D7	        ;in loop mode?
        BMI.S   MEMLOOP	        ;restart if yes
        BTST    #MEM,D7	        ;memory error?
        BNE     TSTCHK	        ;abort if yes
        BRA     IOTST	        ;else go on to next test

        .ENDC		        ;{ROM16K}

        .PAGE
;----------------------------------------------------------------------
;  Subroutine to do initialization for memory tests
;----------------------------------------------------------------------

TSTINIT
        MOVEQ   #2,D2	        ;test in 128K increments		        RM000
        SWAP    D2	        ; (sets D2 = $20000)			        RM000
        MOVE.L  SCRNBASE,D4     ;get max test address (base of screen)
        MOVEA   #LOMEM,A0       ;set initial start
        MOVE.L  D2,A1	        ; and ending address
        MOVEA   #MEMRSLT,A3     ;set address of result area		        RM000
        RTS

;----------------------------------------------------------------------
;  Subroutine to save results and update ptrs.
;----------------------------------------------------------------------

SAVRSLT MOVE    D3,D0	        ;get low results
        SWAP    D3	        ;get high results
   …

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Home Documents Lisa ARS Monitor Notes.Txt
ARS Monitor Notes.Txt

ARS Monitor Notes.Txt

Lisa · TXT
FilenameARS_Monitor_notes.txt
Size0.00 MB
Subsection pascal_monitor
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monitor notes:

directory structure:

These look alot like the UCSD Pascal dir used in Apple ][ Pascal,

Described as a variant record structure, they look something like this;

Type
     DirRecord = Record case boolean of
	{ record for master volume header }
	True:(	BootSector	:integer;
		FirstDataSector	:integer;
		unknown		:integer;
		VolName		:string[7];	{one lenght byte followed by seven character bytes}
		NumberBlocks	:integer;
		NumberFiles	:integer;
		Unknown		:integer;
		VolTimeStamp	:integer);
	{ record for file entries}		
	False:(	StartingSector	:integer;
		EndingSector	:Integer;
		FileType	:integer	{2:code; 3:text; 5:data}
		FileName	:String[15];	{15 bytes of characters preceeded by a length byte}
		BytesinLastSector
				:integer;
		FileTimestamp	:integer)
     End; {record}
     
Note that the True case is two words shorter than the False case, so there are two words of data that
appear to be unsed in master volume header.
Using this record, the volume directory is defined as;
Type
     VolDirectory = Packed Array [0..77] of DirRecord;
     
Where entery zero (0) is the master volume header and one (1) through seventy seven (77) are the actual
file entries.  This directory size is hard coded in the system anmd cannot be changed.  The volume
directory occupies four (4) blocks on the disk from block two (2) to block five (5).  Blocks Zero (0) and
one (1) are the boot blocks for the volume.
	
For some reason, a text file in monitor is preceeded by two sectors of extraneous data, perhaps this is
where the editor stores tab stops, markers and the like.  These two sectors are apparently ignored by the
system, or at least their use is transparent to the user.  The addition of the sectors makes conversion of
files to text a non-trivial task

To convert a monitor file to a monitor text type file that can be read by the normal UCSD editor, 
the following steps must be followed:

1:take a fresh monitor disk and K(runch it.  This puts all the free space on the disk at the end of the disk
  in one contiguous block.
  
2:with the new comand, make the file bs.data[2].  This allocates two sectors of the disk from the top of the
  new huge block of disk space.
  
3:copy the file in question to the disk you have just prepared.

4:r(emove the file bs.data from the disk.  Note the the [2] is not used

5:wuth fedit, go in and change the the pointer to the first sector, so that it points two sectors further
  back than before, for example, change a 32 to 30.  Remember that this is in hex.
  
6:next change the file type to three (3), for a text file

7:finally change the name of the file to xxx.text.

8:now you should be able to read this file with the editor from monitor.	
	
		
To look at a file that is not a .text file, you can use the filer function T(rans.  
for example to look at the file bootfiles.data you would type T Bootfiles.data,systerm:.
(systerm: is the device driver for the screen.)  You can also use console: (another driver for the screen,
the big difference between the two is only apparent when getting input from the devices, one echos a 
keypress while the other does not) or printer:  

Be very very careful when trnsferring files to the printer.  Because this does a strait ASCII dump of the
file, if there are any control codes in the file you are transferring, they can consue the printer fataly
(software-wise I don't think you could damage the actual hardware this way)

Of course, T(rans will also work with a normal text file.
Home Documents ADB Powerkey.Md
Powerkey.Md

Powerkey.Md

ADB · MD
Filenamepowerkey.md
Size0.00 MB
Subsection tashnotes_adb / other
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Contents
# PowerKey

This document contains experimentally-observed behavior of the ADB protocol of the Sophisticated Circuits PowerKey Classic (PK-1). It contains enough information to satisfactorally emulate the device, however, a few unknowns exist.

The PowerKey's default address is 0x7 and its default handler ID is 0x22.

## Register 0

Register 0 is a 16-bit register.  Its upper byte can be written by the host using a Listen 0 command, however its lower byte is read-only and its value in the Listen 0 command will be ignored.  Register 0 can only be read when its bit 8 is set, otherwise Talk 0 produces no reply.

| Bit  | Description                                                                                          |
| ---- | ---------------------------------------------------------------------------------------------------- |
| 15:9 | Undetermined, appears to always be set to 0                                                          |
| 8    | If set, Talk 0 returns the contents of register 0; if clear, it returns nothing                      |
| 7    | If set, relay is closed and outlets are powered; if clear, relay is open and outlets are not powered |
| 6    | If set, relay was last closed as a result of register 1 overflowing                                  |
| 5    | If set, relay was last closed as a result of the power key being pressed on the keyboard             |
| 4:2  | Undetermined, appears to always be set to 0                                                          |
| 1:0  | Undetermined, appears to always be set to 1                                                          |

## Registers 1 and 2

Registers 1 and 2 are both readable (with Talk) and writable (with Listen) 32-bit timers which increment 60 times per second when their high byte is nonzero.  When register 1 overflows from 0xFFFFFFFF to 0, if the relay was open, it closes and sets bits 7 and 6 of register 0.  When register 2 overflows from 0xFFFFFFFF to 0, if the relay was closed, it opens and clears bits 7, 6, and 5 of register 0.

## Register 3

The Exceptional Event bit is always set.  The Service Request Enable bit is always clear.

## Device Information

The software always appears to report the PowerKey Classic as having a serial number of 0 and a firmware revision of 1.4.  No register on the device appears to contain this information.
Home Documents ADB Url.Txt
Url.Txt

Url.Txt

ADB · TXT
Filenameurl.txt
Size0.00 MB
Subsection tashnotes_adb
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https://github.com/lampmerchant/tashnotes
Home Documents Lisa FR3TO1.Text
FR3TO1.Text

FR3TO1.Text

Lisa · TEXT
FilenameFR3TO1.Text
Size0.00 MB
Subsection firmware / ROM88
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Contents
.Page
;++
;		FR3TO1 will take three bytes and create one composite byte from them.
;
;		Input register usage:
;			A :=	>CCCCCCCC<
;			X :=	>BBBBBBBB<
;			Y :=	>AAAAAAAA<
;
;		Output register usage:
;			A :=	>00AABBCC< == Nibblized
;--

FR3TO1	.Equ *			; From three to one routine
	Lsr	A		; Ignore low six bits of "A" as they
	Lsa	A		;  will get shifted out and lost
	Sta	Temp1		; >00CCxxxx<
	Txa
	And	#0C0		; Clear low bits
	Ora	Temp1		; >BBCCxxxx<
	Lsr	A
	Lsr	A
	Sta	Temp1		; >00BBCCxx<
	Tya
	And	#0C0		; Clear low bits
	Ora	Temp!		; >AABBCCxx<
	Lsr	A
	Lsr	A		; >00AABBCC<
	Tax
	Lda	Nibl,X		; Nibblize the new composite byte
	Rts
Home Documents Lisa Lisa Boot ROM Asm Listing.TEXT
Lisa Boot ROM Asm Listing.TEXT

Lisa Boot ROM Asm Listing.TEXT

Lisa · 1983 · TEXT
FilenameLisa_Boot_ROM_Asm_Listing.TEXT
Size0.75 MB
Year1983
Subsection firmware
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0000|                       ;        .NOLIST
0000|                       ;===============================================================================;
0000|                       ;                                                                               ;
0000|                       ;                    LL        II    SSSSSSS       AAA                          ;
0000|                       ;                    LL        II    SS           AA AA                         ;
0000|                       ;                    LL        II    SSSSSSS     AAAAAAA                        ;
0000|                       ;                    LL        II         SS    AA     AA                       ;
0000|                       ;                    LLLLLLL   II    SSSSSSS   AA       AA                      ;
0000|                       ;                                                                               ;
0000|                       ;                                                                               ;
0000|                       ;   BBBBBB     OOOOO     OOOOO    TTTTTTTT      RRRRRR     OOOOO    MMM   MMM   ;
0000|                       ;   BB   BB   OO   OO   OO   OO      TT         RR   RR   OO   OO   MM M M MM   ;
0000|                       ;   BBBBBB    OO   OO   OO   OO      TT         RRRRRR    OO   OO   MM  M  MM   ;
0000|                       ;   BB   BB   OO   OO   OO   OO      TT         RR RR     OO   OO   MM     MM   ;
0000|                       ;   BBBBBB     OOOOO     OOOOO       TT         RR   RR    OOOOO    MM     MM   ;
0000|                       ;                                                                               ;
0000|                       ;                                                                               ;
0000|                       ;       Copyright 1983, 1984 Apple Computer Inc.                                ;
0000|                       ;       Revision 2H                                                             ;
0000|                       ;                                                                               ;
0000|                       ;===============================================================================;
0000|                       ;
0000|                       ; Filename:  RMXXX.Y.TEXT, XXX = ROM VERSION # (e.g., 200 for 2.00)
0000|                       ;                            Y = E (equates)
0000|                       ;                              = K (kernel tests)
0000|                       ;                              = S (secondary tests)
0000|                       ;                              = B (bootstrap code)
0000|                       ;                              = M (monitor code)
0000|                       ;                              = G (graphics, icon and message display)
0000|                       ;
0000|                       ; Function:  Initializes LISA system for use and performs preliminary
0000|                       ;            diagnostic checks.  If all tests pass, the system then
0000|                       ;            does a keyboard scan to check for user input.  If any key
0000|                       ;            is hit other than caps lock or the mouse button,
0000|                       ;            a menu is displayed on the screen showing the available
0000|                       ;            boot devices.  If a valid COMMAND key sequence is detected,
0000|                       ;            a boot from an alternate device is attempted (see below).
0000|                       ;            If no keyboard input is detected, the system first checks
0000|                       ;            parameter memory for a valid boot device and, if none, defaults
0000|                       ;            to booting from a Profile attached to the builtin parallel port
0000|                       ;            for Lisa 1 systems.
0000|                       ;
0000|                       ;            For Lisa 2 systems, a check is first made to verify a disk
0000|                       ;            (internal or external) is connected before defaulting to the
0000|                       ;            hard disk boot.  If no disk is detected, the system defaults
0000|                       ;            to booting from the floppy drive.
0000|                       ;
0000|                       ;
0000|                       ;
0000|                       ; Inputs:    Checks for keyboard input from the user.  Currently, the following
0000|                       ;            key sequences are honored if input after the system "clicks" the
0000|                       ;            speaker (CMD refers to the Apple key on the keyboard):
0000|                       ;
0000|                       ;               CMD/1 - boot from Twiggy drive #1 or integral hard disk
0000|                       ;               CMD/2 - boot from Twiggy drive #2 or SONY drive
0000|                       ;               CMD/3 - boot from Profile attached to parallel port or integral hard disk
0000|                       ;               CMD/4 - boot from I/O slot #1, port 1
0000|                       ;               CMD/5 - boot from I/O slot #1, port 2
0000|                       ;               CMD/6 - boot from I/O slot #2, port 1
0000|                       ;               CMD/7 - boot from I/O slot #2, port 2
0000|                       ;               CMD/8 - boot from I/O slot #3, port 1
0000|                       ;               CMD/9 - boot from I/O slot #3, port 2
0000|                       ;               CMD/ENTER (on key pad) - abort boot, branch to ROM monitor
0000|                       ;               CMD/SHIFT/P - abort boot, do power cycling
0000|                       ;
0000|                       ;  OUTPUTS:  Saves various results and contents of system registers in memory
0000|                       ;            for examination by system programs or with the ROM monitor.
0000|                       ;
0000|                       ;               $180-183 : Power-up status (x0000000 = ok)
0000|                       ;               $184-185 : Memory sizing error results
0000|                       ;               $186-1A5 : Results of memory read/write tests
0000|                       ;               $1A6-1A9 : Parity error memory address (if error during mem test)
0000|                       ;               $1AA-1AB : Memory error address latch
0000|                       ;               $1AC-1AF : D7 save on exception errors
0000|                       ;               $1B0-1B1 : Results of MMU tests (context/data bits)
0000|                       ;               $1B2     : Keyboard ID (00 = no ID received)
0000|                       ;               $1B3     : Boot device ID
0000|                       ;               $1B4-1B9 : Boot failure data
0000|                       ;               $1BA-1BF : Clock setting (Ey,dd,dh,hm,ms,st)
0000|                       ;               $1C0-1DF : Data reg save area (D0 - D7)
0000|                       ;               $1E0-1FF : Address reg save area (A0 - A7, A7 = USP)
0000|                       ;               $240-260 : System serial #
0000|                       ;               $260-267 : Scratch area
0000|                       ;               $268-26B : Suspected (logical) memory error address for parity error
0000|                       ;               $26C-26F : Save of data written to suspected error address
0000|                       ;               $270-273 : Actual (logical) error address found during search
0000|                       ;               $274-277 : Save of data read during parity error search
0000|                       ;               $278-27B : (Physical) error address read from parity error address latch
0000|                       ;               $27C     : Error row for parity chip failure (0 = first row, 7 = last row)
0000|                       ;               $27D     : Error column for parity chip failure (9 or 14)
0000|                       ;               $27E-280 : Reserved
0000|                       ;               $280-293 : Exception data save area
0000|                       ;                           (FC/EXCADR/IR/SR/PC/EXCTYPE/SSP)
0000|                       ;                           44 = NMI or other interrupt
0000|                       ;                           45 = bus error
0000|                       ;                           46 = address error
0000|                       ;                           47 = other exception/interrupt
0000|                       ;                           48 = illegal instruction error
0000|                       ;                           49 = line 1010 or 1111 trap
0000|                       ;                           50 = bus error accessing keyboard VIA
0000|                       ;                           51 = bus error accessing parallel port VIA
0000|                       ;                           57 = bus error accessing disk controller
0000|                       ;               $294-297 : Maximum physical memory address + 1
0000|                       ;               $298-299 : I/O slot 1 card id (0 = no card present)
0000|                       ;               $29A-29B : I/O slot 2 card id
0000|                       ;               $29C-29D : I/O slot 3 card id
0000|                       ;               $29E     : Reserved
0000|                       ;               $29F     : Reserved
0000|                       ;               $2A0     : Reserved
0000|                       ;               $2A1     : Disk ROM id
0000|                       ;               $2A2-2A3 : Reserved
0000|                       ;               $2A4-2A7 : Minimum physical address
0000|                       ;               $2A8-2AB : Total memory (Max-Min)
0000|                       ;               $2AC     : SCC test results
0000|                       ;               $2AD     : Slot # of memory board if memory error
0000|                       ;               $2AE     : Result of disk controller self-test
0000|                       ;               $2AF     : System type (0 = Lisa 1, 1 = Lisa 2, 2 = Lisa 2 with external hard disk,
0000|                       ;                                       3 = Lisa 2 with internal hard disk)
0000|                       ;               $2B0-2BF : Keyboard queue (16 bytes)
0000|                       ;               $2C0-480 : ROM scratchpad/stack area
0000|                       ;               $480-800 : Reserved for ROM local variable usage
0000|                       ;
0000|                       ;            Also saves data in special parameter memory area reserved for boot ROM use if error
0000|                       ;            encountered.  Usage is as follows:
0000|                       ;
0000|                       ;               $FCC161     : Error code
0000|                       ;               $FCC163-165 : Contents of memory error address latch if parity error
0000|                       ;               $FCC167     : Memory board slot # if memory error
0000|                       ;               $FCC169-173 : Last value read from clock
0000|                       ;               $FCC175-17B : Reserved
0000|                       ;               $FCC17D-17F : Checksum
0000|                       ;
0000|                       ; Originator:  Rich Castro  7/30/81 - Version 0.0 released to manufacturing
0000|                       ; Modified by: Rich Castro  7/30 - 11/3/81 - Made the following changes:
0000|                       ;                                      1) Twiggy bootstrap capability
0000|                       ;                                      2) Initial COPS test and keyboard scan
0000|                       ;                                      3) Moved parallel card to slot 2
0000|                       ;                                      4) Changed ROM interrupt/exception vectors,
0000|                       ;                                      5) Created jump table for ROM routines
0000|                       ;
0000|                       ;                           11/3/81  - Version 0.7 released to the world
0000|                       ;
0000|                       ;                           11/4/81 - 1/15/82 - Made the following changes:
0000|                       ;                                      1) Added support for new memory cards
0000|                       ;                                      2) Added warm-start capability and jump
0000|                       ;                                         table for ROM subroutine usage
0000|                       ;                                      3) Modified MMU reset routine to support
0000|                       ;                                         single step board usage
0000|                       ;                                      4) Added full memory initialization
0000|                       ;                                      5) Added 256K memory parity test
0000|                       ;                                      6) Modified COPS initialization so that
0000|                       ;                                         keyboard commands can be sensed more
0000|                       ;                                         reliably
0000|                       ;                                      7) Added error code display routines and
0000|                       ;                                         display of CPU and IO ROM versions
0000|                       ;                                      8) Added preliminary disk controller test
0000|                       ;                                      9) Updated warm-start check
0000|                       ;                                     10) Modified disk interface test
0000|                       ;                                     11) Changed low memory assignments
0000|                       ;                                     12) Made corrections for no I/O board, disk
0000|                       ;                                         interface error and contrast setting
0000|                       ;                                     13) Modified memory sizing routine to
0000|                       ;                                         catch memory errors
0000|                       ;                                     14) Modify MMU test to avoid context 0
0000|                       ;                                         destruction, add contrast setting for
0000|                       ;                                         new machines, correct disk error and
0000|                       ;                                         CPU ROM messages
0000|                       ;                                     15) Move stack so old memory test still runs
0000|                       ;
0000|                       ;                               1/15/82 - Release version 0.16
0000|                       ;                               1/18/82 - Fix stack problem and release vrsn 0.17
0000|                       ;                               1/19/82 - Change stack for call routine and version
0000|                       ;                                         to 0.18
0000|                       ;                               1/27/82 - Change MMU error routine to do address
0000|                       ;                                         and data line toggling
0000|                       ;                               1/28/82 - Add video circuitry test
0000|                       ;                               1/30/82 - Add write wrong parity test
0000|                       ;                               1/31/82 - Move run time stack to $180
0000|                       ;                               2/6/82  - Add Profile bootstrap with upgrade for
0000|                       ;                                         OS use (add jump table entries also)
0000|                       ;                               2/15/82 - Update Twiggy bootstrap and add entry
0000|                       ;                                         for OS use; also add MMU test to
0000|                       ;                                         conditional assembly and add context
0000|                       ;                                         saving to MMUTST2 routine
0000|                       ;                               2/17/82 - Add correction to memory test for
0000|                       ;                                         reboot problem and leave parity on
0000|                       ;                               2/24/82 - Add code for clock test and special
0000|                       ;                                         burn-in cycling
0000|                       ;                               2/25/82 - Add code to simulate soft on switch
0000|                       ;                                         pressed for COPS problem
0000|                       ;                               3/1/82  - Removed all changes since ROM 0.18
0000|                       ;                                         release except for parity enabling,
0000|                       ;                                         no reset feature, memory sizing change
0000|                       ;                                         and Profile booting
0000|                       ;                               3/1/82  - Restore default stack ptr loc to $300
0000|                       ;                               3/1/82  - Move default stack to $0400, restore
0000|                       ;                                         everything except MMU testing
0000|                       ;                               3/4/82  - Add MMU initialization and modify
0000|                       ;                                         Twiggy, Profile boot routines for new
0000|                       ;                                         load point
0000|                       ;                               3/10/82 - Add change for new I/O addresses and
0000|                       ;                                         fix for Twiggy routine
0000|                       ;                               3/10/82 - Change contrast value for new I/O's
0000|                       ;                               3/15/82 - Add correction for Profile and COPS
0000|                       ;                                         routines and display msg when booting
0000|                       ;                               3/17/82 - Restore version # at end of file
0000|                       ;                               3/18/82 - Release version 0.22
0000|                       ;
0000|                       ;                               4/5/82  - Make initial 2732 version (1.00); add
0000|                       ;                                         following changes:
0000|                       ;                                           1) correct MMU error routine bug
0000|                       ;                                           2) change stack for CALL to $0400
0000|                       ;                                           3) add parity disable to WWP routine
0000|                       ;                                           4) change MMU I/O space code to '9'
0000|                       ;                                           5) add invalid boot code message
0000|                       ;                               4/6/82  - Add speaker click after COPS check
0000|                       ;                               4/7/82  - Add jump table entry for speaker
0000|                       ;                                         routine, 1 second delay before "click"
0000|                       ;                                        …

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Home Documents Lisa Lisa Boot ROM RM248.E.TEXT
Lisa Boot ROM RM248.E.TEXT

Lisa Boot ROM RM248.E.TEXT

Lisa · 1983 · TEXT
FilenameLisa_Boot_ROM_RM248.E.TEXT
Size0.08 MB
Year1983
Subsection firmware
Downloads3
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Contents
.NOLIST
;===============================================================================;
;									        ;
;		     LL	       II    SSSSSSS	   AAA			        ;
;		     LL	       II    SS		  AA AA			        ;
;		     LL	       II    SSSSSSS	 AAAAAAA		        ;
;		     LL	       II	  SS    AA     AA		        ;
;		     LLLLLLL   II    SSSSSSS   AA       AA		        ;
;									        ;
;									        ;
;   BBBBBB     OOOOO	 OOOOO	  TTTTTTTT      RRRRRR	   OOOOO    MMM	  MMM   ;
;   BB	 BB   OO   OO   OO   OO	     TT	        RR   RR	  OO   OO   MM M M MM   ;
;   BBBBBB    OO   OO   OO   OO	     TT	        RRRRRR	  OO   OO   MM  M  MM   ;
;   BB	 BB   OO   OO   OO   OO	     TT	        RR RR	  OO   OO   MM	   MM   ;
;   BBBBBB     OOOOO	 OOOOO	     TT	        RR   RR	   OOOOO    MM	   MM   ;
;									        ;
;									        ;
;       Copyright 1983, 1984 Apple Computer Inc.			        ;
;       Revision 2H							        ;
;									        ;
;===============================================================================;
;
; Filename:  RMXXX.Y.TEXT, XXX = ROM VERSION # (e.g., 200 for 2.00)
;			     Y = E (equates)
;			       = K (kernel tests)
;			       = S (secondary tests)
;			       = B (bootstrap code)
;			       = M (monitor code)
;			       = G (graphics, icon and message display)
;
; Function:  Initializes LISA system for use and performs preliminary
;	     diagnostic checks.	 If all tests pass, the system then
;	     does a keyboard scan to check for user input.  If any key
;	     is hit other than caps lock or the mouse button,
;	     a menu is displayed on the screen showing the available
;	     boot devices.  If a valid COMMAND key sequence is detected,
;	     a boot from an alternate device is attempted (see below).
;	     If no keyboard input is detected, the system first checks
;	     parameter memory for a valid boot device and, if none, defaults
;	     to booting from a Profile attached to the builtin parallel port
;	     for Lisa 1 systems.
;
;	     For Lisa 2 systems, a check is first made to verify a disk
;	     (internal or external) is connected before defaulting to the
;	     hard disk boot.  If no disk is detected, the system defaults
;	     to booting from the floppy drive.
;
;
;
; Inputs:    Checks for keyboard input from the user.  Currently, the following
;	     key sequences are honored if input after the system "clicks" the
;	     speaker (CMD refers to the Apple key on the keyboard):
;
;	        CMD/1 - boot from Twiggy drive #1 or integral hard disk
;	        CMD/2 - boot from Twiggy drive #2 or SONY drive
;	        CMD/3 - boot from Profile attached to parallel port or integral hard disk
;	        CMD/4 - boot from I/O slot #1, port 1
;	        CMD/5 - boot from I/O slot #1, port 2
;	        CMD/6 - boot from I/O slot #2, port 1
;	        CMD/7 - boot from I/O slot #2, port 2
;	        CMD/8 - boot from I/O slot #3, port 1
;	        CMD/9 - boot from I/O slot #3, port 2
;	        CMD/ENTER (on key pad) - abort boot, branch to ROM monitor
;	        CMD/SHIFT/P - abort boot, do power cycling
;
;  OUTPUTS:  Saves various results and contents of system registers in memory
;	     for examination by system programs or with the ROM monitor.
;
;	        $180-183 : Power-up status (x0000000 = ok)
;	        $184-185 : Memory sizing error results
;	        $186-1A5 : Results of memory read/write tests
;	        $1A6-1A9 : Parity error memory address (if error during mem test)
;	        $1AA-1AB : Memory error address latch
;	        $1AC-1AF : D7 save on exception errors
;	        $1B0-1B1 : Results of MMU tests (context/data bits)
;	        $1B2	 : Keyboard ID (00 = no ID received)
;	        $1B3	 : Boot device ID
;	        $1B4-1B9 : Boot failure data
;	        $1BA-1BF : Clock setting (Ey,dd,dh,hm,ms,st)
;	        $1C0-1DF : Data reg save area (D0 - D7)
;	        $1E0-1FF : Address reg save area (A0 - A7, A7 = USP)
;	        $240-260 : System serial #
;	        $260-267 : Scratch area
;	        $268-26B : Suspected (logical) memory error address for parity error
;	        $26C-26F : Save of data written to suspected error address
;	        $270-273 : Actual (logical) error address found during search
;	        $274-277 : Save of data read during parity error search
;	        $278-27B : (Physical) error address read from parity error address latch
;	        $27C	 : Error row for parity chip failure (0 = first row, 7 = last row)
;	        $27D	 : Error column for parity chip failure (9 or 14)
;	        $27E-280 : Reserved
;	        $280-293 : Exception data save area
;			    (FC/EXCADR/IR/SR/PC/EXCTYPE/SSP)
;			    44 = NMI or other interrupt
;			    45 = bus error
;			    46 = address error
;			    47 = other exception/interrupt
;			    48 = illegal instruction error
;			    49 = line 1010 or 1111 trap
;			    50 = bus error accessing keyboard VIA
;			    51 = bus error accessing parallel port VIA
;			    57 = bus error accessing disk controller
;	        $294-297 : Maximum physical memory address + 1
;	        $298-299 : I/O slot 1 card id (0 = no card present)
;	        $29A-29B : I/O slot 2 card id
;	        $29C-29D : I/O slot 3 card id
;	        $29E	 : Reserved
;	        $29F	 : Reserved
;	        $2A0	 : Reserved
;	        $2A1	 : Disk ROM id
;	        $2A2-2A3 : Reserved
;	        $2A4-2A7 : Minimum physical address
;	        $2A8-2AB : Total memory (Max-Min)
;	        $2AC	 : SCC test results
;	        $2AD	 : Slot # of memory board if memory error
;	        $2AE	 : Result of disk controller self-test
;	        $2AF	 : System type (0 = Lisa 1, 1 = Lisa 2, 2 = Lisa 2 with external hard disk,
;				        3 = Lisa 2 with internal hard disk)
;	        $2B0-2BF : Keyboard queue (16 bytes)
;	        $2C0-480 : ROM scratchpad/stack area
;	        $480-800 : Reserved for ROM local variable usage
;
;	     Also saves data in special parameter memory area reserved for boot ROM use if error
;	     encountered.  Usage is as follows:
;
;	        $FCC161	    : Error code
;	        $FCC163-165 : Contents of memory error address latch if parity error
;	        $FCC167	    : Memory board slot # if memory error
;	        $FCC169-173 : Last value read from clock
;	        $FCC175-17B : Reserved
;	        $FCC17D-17F : Checksum
;
;
; Originator:  Rich Castro  7/30/81 - Version 0.0 released to manufacturing
;
; Modified by: Rich Castro  7/30 - 11/3/81 - Made the following changes:
;				       1) Twiggy bootstrap capability
;				       2) Initial COPS test and keyboard scan
;				       3) Moved parallel card to slot 2
;				       4) Changed ROM interrupt/exception vectors,
;				       5) Created jump table for ROM routines
;
;			    11/3/81  - Version 0.7 released to the world
;
;			    11/4/81 - 1/15/82 - Made the following changes:
;				       1) Added support for new memory cards
;				       2) Added warm-start capability and jump
;					  table for ROM subroutine usage
;				       3) Modified MMU reset routine to support
;					  single step board usage
;				       4) Added full memory initialization
;				       5) Added 256K memory parity test
;				       6) Modified COPS initialization so that
;					  keyboard commands can be sensed more
;					  reliably
;				       7) Added error code display routines and
;					  display of CPU and IO ROM versions
;				       8) Added preliminary disk controller test
;				       9) Updated warm-start check
;				      10) Modified disk interface test
;				      11) Changed low memory assignments
;				      12) Made corrections for no I/O board, disk
;					  interface error and contrast setting
;				      13) Modified memory sizing routine to
;					  catch memory errors
;				      14) Modify MMU test to avoid context 0
;					  destruction, add contrast setting for
;					  new machines, correct disk error and
;					  CPU ROM messages
;				      15) Move stack so old memory test still runs
;
;			        1/15/82 - Release version 0.16
;			        1/18/82 - Fix stack problem and release vrsn 0.17
;			        1/19/82 - Change stack for call routine and version
;					  to 0.18
;			        1/27/82 - Change MMU error routine to do address
;					  and data line toggling
;			        1/28/82 - Add video circuitry test
;			        1/30/82 - Add write wrong parity test
;			        1/31/82 - Move run time stack to $180
;			        2/6/82  - Add Profile bootstrap with upgrade for
;					  OS use (add jump table entries also)
;			        2/15/82 - Update Twiggy bootstrap and add entry
;					  for OS use; also add MMU test to
;					  conditional assembly and add context
;					  saving to MMUTST2 routine
;			        2/17/82 - Add correction to memory test for
;					  reboot problem and leave parity on
;			        2/24/82 - Add code for clock test and special
;					  burn-in cycling
;			        2/25/82 - Add code to simulate soft on switch
;					  pressed for COPS problem
;			        3/1/82  - Removed all changes since ROM 0.18
;					  release except for parity enabling,
;					  no reset feature, memory sizing change
;					  and Profile booting
;			        3/1/82  - Restore default stack ptr loc to $300
;			        3/1/82  - Move default stack to $0400, restore
;					  everything except MMU testing
;			        3/4/82  - Add MMU initialization and modify
;					  Twiggy, Profile boot routines for new
;					  load point
;			        3/10/82 - Add change for new I/O addresses and
;					  fix for Twiggy routine
;			        3/10/82 - Change contrast value for new I/O's
;			        3/15/82 - Add correction for Profile and COPS
;					  routines and display msg when booting
;			        3/17/82 - Restore version # at end of file
;			        3/18/82 - Release version 0.22
;
;			        4/5/82  - Make initial 2732 version (1.00); add
;					  following changes:
;					    1) correct MMU error routine bug
;					    2) change stack for CALL to $0400
;					    3) add parity disable to WWP routine
;					    4) change MMU I/O space code to '9'
;					    5) add invalid boot code message
;			        4/6/82  - Add speaker click after COPS check
;			        4/7/82  - Add jump table entry for speaker
;					  routine, 1 second delay before "click"
;					  and alpha lock key check
;
;			        4/8/82  - Release version 1.00
;
;			        5/5/82  - Add I/O slot configuration check and
;					  I/O slot booting.  Also add change to
;					  Profile read routine for PCR setting.
;			        5/12/82 - Add burnin power-cycling routine as
;					  boot option invoked by CMD/P.
;			        5/13/82 - Add changes for COPS command timing,
;					  Twiggy timeout, Twiggy booting, and
;					  add power-cycling routine.
;			        5/14/82 - Add fixes for booting via parameter
;					  memory and COPS timing experiment.
;			        5/17/82 - Add display of loop count and run time,
;					  and alter parameter memory useage for
;					  power-cycling option.
;			        5/18/82 - Add display of Twiggy errors, change
;					  COPS routine for precheck code.
;			        5/20/82 - Add contrast reset for "warm start",
;					  add cycle value display, restore COPS
;					  timeout code.
;
;			        5/21/82 - Release version 1.02
;
;			        5/26/82 - Begin addition of ROM monitor; set
;					  default to Apple if PM = 00.
;			        6/1/82  - Make following changes:
;					  1) Memory sizing retry count to 64
;					  2) Save results on memory sizing errors
;					  3) Update NMI routine to check for parity
;					     errors.
;					  4) Restore default NMI vector after
;					     memory test.
;					  5) Create read clock subroutine and call
;					     when doing clock display.
;					  6) Add boot fix to save device id.
;			        6/1/82  - Change to new sizing algorithm and retry
;					  count back to 32.
;			        6/3/82  - Convert to version 1.03
;			        6/3/82  - Made following changes:
;					   1)Localize message display to TSTCHK
;					   2)Do clear screen only in INITVCT and
;					     in TSTCHK and second monitor level.
;					   3)Change default video page to last.
;					   4)Complete first edition of monitor.
;			        6/7/82  - Modify monitor level2 user interface.
;			        6/10/82 - Made following changes:
;					   1)Add boot from Apple as CMD/A.
;					   2)Clear screen and display only in
;					     routine TSTCHK.
;					   3)Add ROM checksum error bit.
;					   4)Add exception error check to TSTCHK.
;					   5)Add speaker click just before
;					     keyboard scan.
;					   6)Reset to first video page for boot
;					     from Apple.
;					   7)Merge in changes from 1.03 file.
;					   8)Add parity error check to TSTCHK
;					   9)Change power-cycling so that double
;					     bus fault used to restart diags
;			        6/11/82 - Made following changes:
;					   1)Increase Twiggy timeout to 2 mins.
;					   2)Add 5 sec delay in power-cycle mode
;					     before shutting down.
;
;			        6/14/82 - Release version 1.04
;
;			        6/22/82 - Add loop after COPS test if error
;					  since keyboard not accessible.  Also add
;					  fix for NMI restore after memory test.
;			        6/30/82 - Made following changes:
;					   1)Add parameter memory and I/O boot
;					     checksum routines.
;					   2)Remove boot id save to parameter
;					     memory, except for power-cycle.
;					   3)Change to new boot device id's.
;			        7/1/82  -  1)Add changes for new Twiggy firmware.
;					   2)Add fixes for bugs in 1.04:
;					    a)Add row setting before error display
;					      to avoid writing over menu line.
;					    b)Set device codes for Profile and
;					      I/O slots to allow display if error.
;					    c)Enable setting of timeout for Twiggy
;					      reads.
;					    d)Save error codes for I/O boot in
;					      memory.
;					    e)Add option of clearing memory in
;					      INITMON routine.
;			        7/7/82  - Made following changes:
;					   1)Modify checksum routines
;					   2)Add keyboard/mouse check/reset code
;			        7/13/82 - Add speed parameter for new Twiggy code
;			        7/14/82 - Add check for DSKDIAG in disk test,
;					  change to new Twiggy error codes
;			        7/15/82 - Made following changes:
;					   1)Add Profile routine updates.
;					   2)Restore old boot id codes - new ones
;					     used only when new Twiggy code
;					     released.
;					   3)Upgrade burnin code for new parameter
;					     memory usage.
;					   4)Attempt to enable keyboard after MMU
;					     errors.
;					   5)Remove I/O boot checksum code until
;					     conversion to new Twiggy code.
;					   6)Add video pattern display code..
;					   7)Remove characters from table and
;					     make other changes to save bytes.
;					   8)Upgrade service mode display option
;					     to handle count up to $FFFF.
;
;			        7/16/82 - Create version 1.05
;			        7/19/82 - Add bug fixes for MMU testing, power-
;					  cycle memory testing, Profile boot
;					  and service mode display option.
;
;			        7/19/82 - Create version 1.06
;			        7/20/82 - Add fix for MMU testing to properly
;					  record context in error
;
;			        7/20/82 - Release version 1.07
;
;			        7/21/82 - Make keyboard/mouse reset code changes
;					  and move check to before first "click"
;			        7/23/82 - Add extended memory tests
;			        7/27/82 - Add screen memory test and VIA tests.
;					  Change default boot for new Twiggy code
;					  to upper Twiggy.  Add conditionals for
;					  Apple code.
;			        7/29/82 - Add SCC test, optimize code.
;			        7/30/82 - Add RAM address uniqueness test.
;			        8/4/82  - Added the following:
;					   1)Twiggy mods for interleave
;					   2)Monitor options CONTINUE and LOOP
;					   3)Exception routine for line 1111 and
;					     line 1010 errors.
;			        8/9/82  - Add Twiggy mod for disk clamp, add mods
;					  for kernel test failures such as screen
;					  flash on MMU error.
;			        8/11/82 - Add memory sizing fix, increase delay
;					  for COPS and change default boot to
;					  TWIGGY!!
;			        8/12/82 - Begin code changes for new user interface
;					  and add hooks for icon display.
;			        8/14/82 - Add mods for Twiggy changes to monitor
;					  DSKDIAG line and add initial timeout.
;					  Continue user interface changes.
;			        8/18/82 - Add mouse, cursor code and changes for
;					  Customer mode to use mouse.
;			        8/23/82 - Add controls for 2716 version of ROM.
;					  Add changes for Service mode to use
;					  pull down menu, eliminate keyboard
;					  queuing while awaiting input.
;			        8/24/82 - Add dialog box, and window to service
;					  mode with modified scroll and character
;					  output routines.
;			        8/25/82 - Add icons along with routines to display
;					  during test and for errors.
;			        8/27/82 - Add routines for displaying and using
;					  boot icon menu.
;			        8/30/82 - Add auto boot from Applenet.
;			        8/31/82 - Add minor additions to Service mode
;					  for Set and Loop options.
;
;			        8/31/82 - Create and do internal release of
;					  2716 (0.24), 2732 (1.15) and 2764 (2.00)
;					  ROM versions.
;
;			        9/8/82  - Add fixes for I/O slot icon display
;					  and Profile icon display.
;			        9/9/82  - Add fix for reboot problem in 2716 ROM.
;					  Add serial # read routine and test for
;					  2732 and 2764 ROM versions.  Expand
;					  stack for serial read routine.
;			        9/10/82 - Add fix for device code display for ROM
;					  versions 0.24 and 1.15.
;
;			        9/10/82 - Create and do internal release of new
;					  ROM versions 0.25, 1.16 and 2.01.
;
;			        9/13/82 - Add fixes for memory sizing and I/O
;					  slot booting.
;
;			        9/14/82 - Create and release ROM versions 0.26,
;					  1.17 and 2.02.
;
;			        9/22/82 - Add fixes and code for:
;					   1)Default video latch setting
;					   2)Mask for I/O and exception errors
;					   3)Message display on external calls
;					      to ROM monitor
;					   4)Contrast setting before screen test
;					   5)Disable of NMI key on power-up
;					   6)Boot failure after first load
;					   7)Error tones for failures
;					   8)Loop mode setting of NMI key
;			        9/23/82 - Add
;					   1)Power cycling
;					   2)Full service mode menu
;					   3)Loop mode test choice display
;			        9/24/82 - Add dump memory option to service mode
;			        9/25/82 - Modify display memory option to allow
;					  count and address data on same line
;			        9/29/82 - Add jump table entry for READMMU
;			        9/30/82 - Add:
;					   1)"No reset" feature
;					   2)Verify Disk option for service mode
;					   3)Optimize cursor routines and
;					     remove unused CursorShield routine.
;					   4)Invert rectangles when selected from
;					     keyboard.
;					   5)Display boot menu only if down keycode
;					     detected.
;			        10/5/82 - Add:
;					   1)Memory error decoding to board level
;					   2)New size and position for alert box
;					   3)New test icon display
;					   4)Diskette # for Twiggy errors
;			        10/6/82 - Add:
;					   1)Continue keyboard scan after COPS
;					     errors
;					   2)Set extended memory test bit for
;					     loop on memory test option
;					   3)Display I/O slot card # on errors
;					   4)Change boot menu to "pull-down" format
;					   5)Change to new icons
;			        10/7/82 - Add:
;					   1)SCC test
;					   2)Error if no serial # (allow continue)
;					   3)Two passes of memory tests for extended
;					     mode, one for regular mode
;			        10/9/82 - Create version 2.03
;			        10/10/82 - Add bug fixes and I/O slot ROM check in
;					   config scan.
;
;			        10/12/82 - Create and release version 2.04.
;
;			        10/13/82 - Make following changes:
;					    1)Add keyboard reset code
;					    2)Remove SCC test
;					    3)Add bug fixes for making alert box
;					      and displaying bad keyboard
;			        10/14/82 - Add display of check marks for test icons
;			        10/18/82 - Add fixes for…

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Home Documents Lisa Disk Format Notes.Txt
Disk Format Notes.Txt

Disk Format Notes.Txt

Lisa · TXT
Filenamedisk_format_notes.txt
Size0.00 MB
Subsection sun_remarketing / Sun_MFM_Controller
Downloads3
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Contents
Code up in testing if you wish to try. In looking further its not seek
error, they are being really irritating. The drive has two cylinder 0's.
On the first read it isn't interleaved and after the seek it is interleaved.
My code doesn't have much hope of handling that cleanly.
Head 1-3 on the first cylinder 0 look like they aren't formatted the same
as zero.

Try reading with 
--sectors 17,0 --heads 4 --cylinders 615 --header_crc 0x2605fb9c,0x104c981,32,5 --data_crc  0x84a36c27,0x104c981,32,5 --format OMTI_5510 --sector_length 532 --retries 50,4 --drive 1

without --ignore_seek_errors it should read the first cyl 0 then
see the second and assume a seek error and move on to cyl 1/2.

With --ignore_seek_errors it will overwrite the first cyl 0 with the second
and ignore mismatches between the expected cylinder and actual. Data will
be written to cylinder read from header.

You can change the ,5 to ,11 on the crc to increase the ECC to 11 bits to
try to recover more sectors. OMTI said 5 bit correct but others have
said 11 bit with 32 bit ECC. Larger number increases chance of miscorrect.
Home Documents Lisa Lisa Boot ROM Assembly.TEXT
Lisa Boot ROM Assembly.TEXT

Lisa Boot ROM Assembly.TEXT

Lisa · 1984 · TEXT
FilenameLisa_Boot_ROM_Assembly.TEXT
Size0.00 MB
Year1984
Subsection firmware
Downloads3
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Contents
( Lisa 68000 Assembler progress listing for List Boot ROM 2.48 )

ASSEMBLER - MC68000 (Ver 3.77)    02-May-85
(C) 1984 Apple Computer Inc.
 
 
Options:     Meaning                   Current Value.
+P        Pretty Listing                    FALSE
+S        Print Space Avail                 FALSE
+E        Code patching efficiency check    FALSE
?         Print options
<ret>     Accept options
 
Input file ? [.TEXT] ?
 
options : +P
options :
 
Input file ? [.TEXT] RM248.E
Listing file (<CR> for none) ? [.TEXT] -PROFILE-RM248.LIST
Output file ? [RM248.E] [.OBJ] RM248
 
<    0>..................................................
<  500>..................................................
< 1000>..................................................
< 1500>................
        .INCLUDE RM248.K.TEXT
 
< 1667>.
        .PROC   LISAROM,0
 
< 1674>.................................
< 2000>..................................................
< 2500>..................................................
< 3000>..................................................
< 3500>......
        .INCLUDE RM248.S.TEXT
 
< 3567>............................................
< 4000>..................................................
< 4500>..................................................
< 5000>..................................................
< 5500>.....
        .INCLUDE RM248.B.TEXT
 
< 5551>.............................................
< 6000>..................................................
< 6500>..................................................
< 7000>..................................................
< 7500>................
        .INCLUDE RM248.M.TEXT
 
< 7667>..................................
< 8000>..................................................
< 8500>..................................................
< 9000>..................................................
< 9500>..........
        .INCLUDE RM248.G.TEXT
 
< 9602>........................................
<10000>..................................................
<10500>..................................................
<11000>..................................................
<11500>..................................
 
  Assembly complete:     11840 lines
     0   Warnings
     0   Errors
 
MC68000 Assembly Pretty Listing  (Ver 3.77)
 
pass one - getting patches
<   0>   ..................................................
< 100>   ..................................................
< 200>   ..................................................
< 300>   ..................................................
< 400>   ..................................................
< 500>   ..................................................
< 600>   ..................................................
< 700>   ..................................................
< 800>   ..................................................
< 900>   ..................................................
<1000>   ..................................................
<1100>   ..................................................
<1200>   ..................................................
<1300>   ..................................................
<1400>   ..................................................
<1500>   ..................................................
<1600>   ..................................................
<1700>   ..................................................
<1800>   .........................
pass two - making updates
<   0>   ..................................................
< 100>   ..................................................
< 200>   ..................................................
< 300>   ..................................................
< 400>   ..................................................
< 500>   ..................................................
< 600>   ..................................................
< 700>   ..................................................
< 800>   ..................................................
< 900>   ..................................................
<1000>   ..................................................
<1100>   ..................................................
<1200>   ..................................................
<1300>   ..................................................
<1400>   ..................................................
<1500>   ..................................................
<1600>   ..................................................
<1700>   ..................................................
<1800>   .........................
 
ASSEMBLY COMPLETE.
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