<h1 class="sectionedit1" id="mac_technical_notes">Mac Technical Notes</h1>
<div class="level1">

<p>
Compiled from many sources including Linux and NetBSD kernel source, 
Guide to the Macintosh Family Hardware 1st and 2nd editions, Designing 
Cards and Drivers for the Macintosh Family 3rd edition, <a href="http://web.archive.org/web/20100729100247/http://developer.apple.com/legacy/mac/library/documentation/Hardware/hardware2.html" class="urlextern" title="http://web.archive.org/web/20100729100247/http://developer.apple.com/legacy/mac/library/documentation/Hardware/hardware2.html" rel="nofollow">Apple hardware notes (archive)</a>, even <a href="http://developer.apple.com/legacy/library/navigation/index.html" class="urlextern" title="http://developer.apple.com/legacy/library/navigation/index.html" rel="nofollow">more Apple hardware notes</a>, and good old fashioned reverse-engineering.
</p>

<p>
This concentrates mostly on Mac II and later machines since the 
Plus/SE/Classic are fairly well understood. Please contact messdrivers 
[at] gmail [dot] com if you have any further information on any Mac 
models.
</p>
<hr>

</div>

<h1 class="sectionedit2" id="basic_memory_map">Basic Memory Map</h1>
<div class="level1">

<p>
On most Mac II and later machines, it's like this:
</p>
<ul>
<li class="level1"><div class="li"> 0x00000000-0x3fffffff = RAM</div>
</li>
<li class="level1"><div class="li"> 0x40000000-0x4fffffff = ROM</div>
</li>
<li class="level1"><div class="li"> 0x50000000-0x5fffffff = I/O</div>
</li>
<li class="level1"><div class="li"> 0x60000000-0xefffffff = NuBus “super slot” space</div>
</li>
<li class="level1"><div class="li"> 0xf1000000-0xffffffff = NuBus “standard slot” space</div>
</li>
</ul>
<ul>
<li class="level1"><div class="li"> 0xfe000000 = VRAM (SE/30 only)</div>
</li>
<li class="level1"><div class="li"> 0xfeff0000 = VROM (SE/30) (note that
 while the main ROM has a valid driver at the end, SE/30 has a separate 
64 kbit VROM on the board which I dumped. The actual driver is very 
small, it contains mostly hardware credits for the SE/30)</div>
</li>
</ul>

<p>
Note that Macs with on board video except for the SE/30 typically 
contain one or more valid video drivers in ROM; the correct one is used 
when the machine type is identified.
</p>

<p>
I/O devices are given as offsets from 0x50000000. Each device is mapped across 0x2000 bytes unless noted otherwise.
</p>
<ul>
<li class="level1"><div class="li"> VIA1 at offset 0. May also be mirrored at 0x20000 and 0x40000.</div>
</li>
<li class="level1"><div class="li"> VIA2 at offset 0x2000 on II, IIx, IIcx, and SE/30</div>
</li>
<li class="level1"><div class="li"> SCC (Z8530) at offset 0x4000</div>
</li>
<li class="level1"><div class="li"> SCSI (pseudo-DMA w/DRQ on II, handshake on SE/30) at offset 0x6000</div>
</li>
<li class="level1"><div class="li"> SCSI (normal) at 0x10000</div>
</li>
<li class="level1"><div class="li"> SCSI (pseudo-DMA, no DRQ) at offset 0x12000</div>
</li>
<li class="level1"><div class="li"> ASC (Apple Sound Chip) at 0x14000</div>
</li>
<li class="level1"><div class="li"> IWM/SWIM (floppy) at 0x16000</div>
</li>
</ul>
<ul>
<li class="level1"><div class="li"> VDAC (palette) at 0x24000 (IIci, IIsi, LC series, Color Classic)</div>
</li>
<li class="level1"><div class="li"> RBV/V8/etc registers (partially emulates VIA2, also video registers) at 0x26000 (IIci &amp; IIsi, LC series, Color Classic)</div>
</li>
<li class="level1"><div class="li"> RBV VRAM at 0x1000000 (IIci)</div>
</li>
</ul>

<p>
The entire I/O space mirrors every 0x20000 on Mac II, IIx, IIcx, and 
SE/30. IIsi and IIfx mirror every 0x40000. IIci and Color Classic (and 
LC series?) do not mirror. The ROMs use this mirroring behavior along 
with other markers to determine the model they're running on.
</p>

<p>
The bottom 8k or so of RAM contains significant system data on these Macs. See <a href="http://www.osdata.com/system/physical/lowmem.htm#Mac" class="urlextern" title="http://www.osdata.com/system/physical/lowmem.htm#Mac" rel="nofollow">Low Memory Globals</a> and <a href="http://www.mac.linux-m68k.org/devel/macalmanac.php" class="urlextern" title="http://www.mac.linux-m68k.org/devel/macalmanac.php" rel="nofollow">Mac Almanac</a>
 for lists. Note that on the IIci/IIsi the video frame buffer is at 
physical address 0; the 68030 MMU is used to remap addresses so software
 sees address 0 elsewhere and thus the low-memory globals work as usual.
</p>
<hr>

</div>

<h1 class="sectionedit3" id="via_1">VIA 1</h1>
<div class="level1">

<p>
Data register A for the Mac 128/512/512e/Plus
</p>
<ul>
<li class="level1"><div class="li"> bit 7 = SCC Wait/Request input</div>
</li>
<li class="level1"><div class="li"> bit 6 = Alternate screen buffer output</div>
</li>
<li class="level1"><div class="li"> bit 5 = Floppy disk head select output</div>
</li>
<li class="level1"><div class="li"> bit 4 = output: overlay ROM at 0 when 1 (enabled at reset)</div>
</li>
<li class="level1"><div class="li"> bit 3 = Alternate sound buffer output</div>
</li>
<li class="level1"><div class="li"> bits 0-2 = Sound volume output</div>
</li>
</ul>

<p>
On the SE, bit 4 changes to select upper/lower internal floppy drive 
(the ROM overlay is enabled at reset and disabled by the first 
instruction fetch at 0x4xxxxx).
</p>

<p>
Data register A for the SE/30, II, IIx, and IIcx:
</p>
<ul>
<li class="level1"><div class="li"> bit 7 = SCC Wait/Request input</div>
</li>
<li class="level1"><div class="li"> bit 6 = Alternate screen buffer output on SE/30, model number input on others</div>
</li>
<li class="level1"><div class="li"> bit 5 = Floppy disk head select output</div>
</li>
<li class="level1"><div class="li"> bit 4 = output: overlay ROM at 0 when 1 (enabled at reset)</div>
</li>
<li class="level1"><div class="li"> bit 3 = output: 1 to enable synchronous modem support on port A</div>
</li>
<li class="level1"><div class="li"> bits 0-2 = reserved (bit 0 must be 1 to avoid forced diagnostic boot over AppleTalk)</div>
</li>
</ul>

<p>
Data register A for the IIci / IIfx:
</p>
<ul>
<li class="level1"><div class="li"> bit 7 = SCC Wait/Request input</div>
</li>
<li class="level1"><div class="li"> bit 6 = model ID bit 3 (1 for IIci or IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 5 = Floppy disk head select output</div>
</li>
<li class="level1"><div class="li"> bit 4 = model ID bit 2 (1 for IIfx or IIci with parity option)</div>
</li>
<li class="level1"><div class="li"> bit 3 = output: 1 to enable synchronous modem support on port A</div>
</li>
<li class="level1"><div class="li"> bit 2 = model ID bit 1 (1 for IIci, 0 for IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 1 = model ID bit 0 (1 for IIci or IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 0 = reserved (must be 1 to avoid forced diagnostic boot over AppleTalk)</div>
</li>
</ul>

<p>
Data register B for the Mac 128/512/512e/Plus:
</p>
<ul>
<li class="level1"><div class="li"> bit 7 = output: 0 to enable sound, 1 to disable</div>
</li>
<li class="level1"><div class="li"> bit 6 = input: 0 = video in display portion of scanline, 1 = hblank or vblank</div>
</li>
<li class="level1"><div class="li"> bit 5 = input: mouse Y2</div>
</li>
<li class="level1"><div class="li"> bit 4 = input: mouse X2</div>
</li>
<li class="level1"><div class="li"> bit 3 = input: mouse button (0 = pressed)</div>
</li>
<li class="level1"><div class="li"> bit 2 = output: 0 = enable RTC chip select</div>
</li>
<li class="level1"><div class="li"> bit 1 = output: RTC clock line</div>
</li>
<li class="level1"><div class="li"> bit 0 = output: RTC data line</div>
</li>
</ul>

<p>
Data register B in the SE/30, II, IIx, IIfx, IIcx, and IIci:
</p>
<ul>
<li class="level1"><div class="li"> bit 7 = input on IIci (parity error), output otherwise (sound enable, but ignored by h/w)</div>
</li>
<li class="level1"><div class="li"> bit 6 = output: 0 to enable parity checking on IIci, 0 to enable vsync IRQ on SE/30, unused otherwise</div>
</li>
<li class="level1"><div class="li"> bit 5 = output: ADB state 1 (except IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 4 = output: ADB state 0 (except IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 3 = input: ADB interrupt (except IIfx)</div>
</li>
<li class="level1"><div class="li"> bit 2 = output: 0 = enable RTC chip select</div>
</li>
<li class="level1"><div class="li"> bit 1 = output: RTC clock line</div>
</li>
<li class="level1"><div class="li"> bit 0 = output: RTC data line</div>
</li>
</ul>
<hr>

</div>

<h1 class="sectionedit4" id="via_2">VIA 2</h1>
<div class="level1">
<hr>

</div>

<h1 class="sectionedit5" id="coprocessors">Coprocessors</h1>
<div class="level1">

<p>
Separate pages are in progress discussing technical features of each of 
the co-processors used on various Macs. These typically handle ADB, 
clock, and PRAM, plus power management features on portables and power 
on/off on some desktops.
</p>

<p>
<a href="http://mess.redump.net/mess/driver_info/m50753-based_pmu" class="wikilink1" title="mess:driver_info:m50753-based_pmu">M50753 PMUs</a> (Mac Portable, PowerBook 100, 140/170, 145(B), 160/180)
</p>

<p>
68HC05-based PMU (PowerBook 150, 190, all Duos, 5xx)
</p>

<p>
<a href="http://mess.redump.net/mess/driver_info/68hc05-based_egret" class="wikilink2" title="mess:driver_info:68hc05-based_egret" rel="nofollow">68HC05-based Egret</a>
 (LC, LC II, LC III, Classic II, IIsi, IIvx/IIvi), Caboose (some 
Quadras), and Cuda (Color Classic, most 68040 machines, all PowerPC 601,
 603, 604, and most G3).
</p>
<hr>

</div>

<h1 class="sectionedit6" id="hardware_ids">Hardware IDs</h1>
<div class="level1">

<p>
There are 3 ID schemes used on the various 68020/030/040 Macs. The first
 uses bit 6 of port A on VIA1 (PA6) and bit 3 of port B on VIA 2 (PB3) 
and works like this:
</p>
<div class="table sectionedit7"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0 leftalign"> Model    </th><th class="col1">PA6 </th><th class="col2">PB3 </th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0 leftalign"> Mac IIx  </td><td class="col1 leftalign">0   </td><td class="col2 leftalign">0   </td>
	</tr>
	<tr class="row2">
		<td class="col0 leftalign"> Mac II   </td><td class="col1 leftalign">0   </td><td class="col2 leftalign">1   </td>
	</tr>
	<tr class="row3">
		<td class="col0"> Mac SE/30</td><td class="col1 leftalign">1   </td><td class="col2 leftalign">0   </td>
	</tr>
	<tr class="row4">
		<td class="col0"> Mac IIcx </td><td class="col1 leftalign">1   </td><td class="col2 leftalign">1   </td>
	</tr>
</tbody></table></div>

<p>
The second uses 4 bits in VIA1 port A: bits 6, 4, 2, and 1 (PA6, PA4, PA2, and PA1, respectively).
</p>

<p>
This second scheme is further indexed by the core ASIC type detected by 
the Universal ROM. The PowerBook 170 and Classic II have the same ID 
bits, but that works because the PB170 and Classic II have very 
different core ASICs that are easily detected as different. These bits 
also are used to differentiate machines with the same ID word such as 
the Quadra and Centris 610/650/800.
</p>
<div class="table sectionedit8"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0 leftalign">Model                  </th><th class="col1">PA6</th><th class="col2">PA4</th><th class="col3">PA2</th><th class="col4">PA1</th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0 leftalign">PowerBook 150          </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row2">
		<td class="col0 leftalign">Color Classic          </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">1  </td>
	</tr>
	<tr class="row3">
		<td class="col0 leftalign">Unused                 </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row4">
		<td class="col0">Unreleased MDU-using SE/30 Successor</td><td class="col1">0</td><td class="col2">0</td><td class="col3">1</td><td class="col4">1</td>
	</tr>
	<tr class="row5">
		<td class="col0 leftalign">Quadra 950             </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row6">
		<td class="col0">PowerBook 140/170, Classic II, Quadra 800</td><td class="col1">0</td><td class="col2">1</td><td class="col3">0</td><td class="col4">1</td>
	</tr>
	<tr class="row7">
		<td class="col0 leftalign">Used, unknown machine  </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row8">
		<td class="col0 leftalign">Mac IIsi               </td><td class="col1 leftalign">0  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">1  </td>
	</tr>
	<tr class="row9">
		<td class="col0">Quadra 700, Centris 610</td><td class="col1 leftalign">1  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row10">
		<td class="col0 leftalign">Unreleased 20Mhz 650   </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">1  </td>
	</tr>
	<tr class="row11">
		<td class="col0 leftalign">Quadra 610             </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row12">
		<td class="col0 leftalign">Mac IIci, Centris (25Mhz) 650  </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">0  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">1  </td>
	</tr>
	<tr class="row13">
		<td class="col0 leftalign">Quadra 900             </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row14">
		<td class="col0 leftalign">Mac IIfx, Quadra (33Mhz) 650   </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">0  </td><td class="col4 leftalign">1  </td>
	</tr>
	<tr class="row15">
		<td class="col0">Mac LC, LC2, IIvx, IIvi</td><td class="col1 leftalign">1  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">0  </td>
	</tr>
	<tr class="row16">
		<td class="col0 leftalign">Mac IIci w/PGC         </td><td class="col1 leftalign">1  </td><td class="col2 leftalign">1  </td><td class="col3 leftalign">1  </td><td class="col4 leftalign">1  </td>
	</tr>
</tbody></table></div>

<p>
The third and most scalable is a machine ID register at 0x5ffffffc. The 
top word must be 0xa55a to be valid. Then bits 15-11 are 0 for consumer 
Macs, 1 for portables, 2 for high-end 68k, and 3 for high-end PowerPC. 
Bit 10 is 1 if additional ID bits appear elsewhere (e.g. in VIA1). The 
rest of the bits are a per-model identifier. Updated and corrected 
January 2, 2012: confusion between “Blackbird” the IIfx codename and 
“Blackbird” the PowerBook 5×0 codename resolved, and many new ID values 
added on through the end of the Old World.
</p>
<div class="table sectionedit9"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0 leftalign">Model               </th><th class="col1">Lower 16 bits of ID</th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0 leftalign">LC III              </td><td class="col1">0x0001</td>
	</tr>
	<tr class="row2">
		<td class="col0 leftalign">LC III+             </td><td class="col1">0x0003</td>
	</tr>
	<tr class="row3">
		<td class="col0 leftalign">LC 520              </td><td class="col1">0x0100</td>
	</tr>
	<tr class="row4">
		<td class="col0">LC 550 (and Color Classic II?)</td><td class="col1">0x0101</td>
	</tr>
	<tr class="row5">
		<td class="col0 leftalign">PowerBook Duo 280c  </td><td class="col1">0x1000</td>
	</tr>
	<tr class="row6">
		<td class="col0 leftalign">PowerBook Duo 270c  </td><td class="col1">0x1002</td>
	</tr>
	<tr class="row7">
		<td class="col0 leftalign">PowerBook Duo 210   </td><td class="col1">0x1004</td>
	</tr>
	<tr class="row8">
		<td class="col0 leftalign">PowerBook Duo 230   </td><td class="col1">0x1005</td>
	</tr>
	<tr class="row9">
		<td class="col0 leftalign">PowerBook Duo 235   </td><td class="col1">0x1006</td>
	</tr>
	<tr class="row10">
		<td class="col0 leftalign">PowerBook 520/540   </td><td class="col1">0x1808</td>
	</tr>
	<tr class="row11">
		<td class="col0 leftalign">PowerBook Duo 2300  </td><td class="col1">0x1809</td>
	</tr>
	<tr class="row12">
		<td class="col0 leftalign">PowerBook 5300      </td><td class="col1">0x180a</td>
	</tr>
	<tr class="row13">
		<td class="col0 leftalign">PowerBook 190       </td><td class="col1">0x180b</td>
	</tr>
	<tr class="row14">
		<td class="col0 leftalign">IIvx                </td><td class="col1">0x2015</td>
	</tr>
	<tr class="row15">
		<td class="col0 leftalign">LC 475              </td><td class="col1">0x2221</td>
	</tr>
	<tr class="row16">
		<td class="col0 leftalign">Quadra 605          </td><td class="col1">0x2225</td>
	</tr>
	<tr class="row17">
		<td class="col0 leftalign">Quadra 630          </td><td class="col1">0x2226</td>
	</tr>
	<tr class="row18">
		<td class="col0 leftalign">LC 575              </td><td class="col1">0x222e</td>
	</tr>
	<tr class="row19">
		<td class="col0">Quadra/Centris 610/650/800</td><td class="col1">0x2BAD</td>
	</tr>
	<tr class="row20">
		<td class="col0 leftalign">Quadra 660/840      </td><td class="col1">0x2830</td>
	</tr>
	<tr class="row21">
		<td class="col0 leftalign">PowerMac 6100       </td><td class="col1">0x3010</td>
	</tr>
	<tr class="row22">
		<td class="col0 leftalign">PowerMac 7100       </td><td class="col1">0x3012</td>
	</tr>
	<tr class="row23">
		<td class="col0 leftalign">PowerMac 8100       </td><td class="col1">0x3013</td>
	</tr>
	<tr class="row24">
		<td class="col0 leftalign">PowerMac 7500       </td><td class="col1">0x3020</td>
	</tr>
	<tr class="row25">
		<td class="col0 leftalign">PowerMac 7300       </td><td class="col1">0x3021</td>
	</tr>
	<tr class="row26">
		<td class="col0">PowerMac 7600/8600/9600</td><td class="col1">0x3022</td>
	</tr>
	<tr class="row27">
		<td class="col0 leftalign">PowerBook 2400      </td><td class="col1">0x3025</td>
	</tr>
	<tr class="row28">
		<td class="col0 leftalign">PowerBook 3400      </td><td class="col1">0x3026</td>
	</tr>
	<tr class="row29">
		<td class="col0">PowerMac G3 “Beige” </td><td class="col1">0x3041</td>
	</tr>
	<tr class="row30">
		<td class="col0">PowerBook G3 “WallStreet”</td><td class="col1">0x3042</td>
	</tr>
	<tr class="row31">
		<td class="col0">PowerBook G3 “WallStreet”</td><td class="col1">0x3046</td>
	</tr>
	<tr class="row32">
		<td class="col0 leftalign">Pippin @Mark        </td><td class="col1">0x7100</td>
	</tr>
</tbody></table></div>

</div>

<h1 class="sectionedit10" id="known_non-_new_world_roms">Known non-"New World" ROMs</h1>
<div class="level1">

<p>
All Mac ROMs contain a checksum in the first 4 bytes of the image. This 
is what the “Apple checksum” below is referring to, and not the CRC32 of
 the entire file. The Apple checksum is calculated by taking the low 32 
bits of the sum of every unsigned 16 bit word in the rom, except for the
 first 4 bytes.
</p>

<p>
“Release date” is sometimes the ROM's internal release date rather than when the system was introduced to the public.
</p>

<p>
“Major Version” is the word at offset 0x8. “Minor Version” is the word at offset 0x12. “Sub Release” is the word at offset 0x4c.
</p>
<div class="table sectionedit11"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0">S…

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<!DOCTYPE html>
                    
<h3 class="sectionedit1" id="enhanced_apple_sound_chip_easc">Enhanced Apple Sound Chip (EASC)</h3>
<div class="level3">

</div>

<h5 id="memory_map">Memory Map</h5>
<div class="level5">

<p>
All offsets from the base address of the chip
</p>
<div class="table sectionedit2"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0">Starting offset</th><th class="col1">Function</th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0">0x000</td><td class="col1">FIFO A</td>
	</tr>
	<tr class="row2">
		<td class="col0">0x400</td><td class="col1">FIFO B</td>
	</tr>
	<tr class="row3">
		<td class="col0">0x800</td><td class="col1">Version (read-only) EASC returns 0xB0.</td>
	</tr>
	<tr class="row4">
		<td class="col0">0x801</td><td class="col1">Mode: 0 = disable (repeat last sample output infinitely), 1 = run </td>
	</tr>
	<tr class="row5">
		<td class="col0">0x802</td><td class="col1">Overflow flag: bit 7 set if engine overrun</td>
	</tr>
	<tr class="row6">
		<td class="col0">0x803</td><td class="col1">FIFO clear strobe (bit 7)</td>
	</tr>
	<tr class="row7">
		<td class="col0">0x804</td><td class="col1">FIFO interrupt status: bit 0 = A half full, bit 1 = A full/empty, bit 2 = B half full, bit 3 = B full/empty</td>
	</tr>
	<tr class="row8">
		<td class="col0">0x806</td><td class="col1">Volume control (top 3 bits only)</td>
	</tr>
	<tr class="row9">
		<td class="col0">0x807</td><td class="col1">Clock rate select on ASC: hardwired to return 0x03 here</td>
	</tr>
	<tr class="row10">
		<td class="col0">0x80A</td><td class="col1">Channel A play/record: bit 0 = 0 for play, 1 for record, bit 1 = 0 for 11 kHz record, 1 for 22 kHz record</td>
	</tr>
	<tr class="row11">
		<td class="col0">0x80F</td><td class="col1">Test logic control (bit 7)</td>
	</tr>
	<tr class="row12">
		<td class="col0">0xF00</td><td class="col1">A write pointer high</td>
	</tr>
	<tr class="row13">
		<td class="col0">0xF01</td><td class="col1">A write pointer low</td>
	</tr>
	<tr class="row14">
		<td class="col0">0xF02</td><td class="col1">A read pointer high</td>
	</tr>
	<tr class="row15">
		<td class="col0">0xF03</td><td class="col1">A read pointer low</td>
	</tr>
	<tr class="row16">
		<td class="col0">0xF04</td><td class="col1">A sample rate time increment high</td>
	</tr>
	<tr class="row17">
		<td class="col0">0xF05</td><td class="col1">A sample rate time increment low</td>
	</tr>
	<tr class="row18">
		<td class="col0">0xF06</td><td class="col1">A left volume</td>
	</tr>
	<tr class="row19">
		<td class="col0">0xF07</td><td class="col1">A right volume</td>
	</tr>
	<tr class="row20">
		<td class="col0">0xF08</td><td class="col1">A FIFO control (bit 7 = 1 to enable CD-XA decompression)</td>
	</tr>
	<tr class="row21">
		<td class="col0">0xF09</td><td class="col1">A interrupt control (bit 0 = 1 to enable buffer half-full IRQ)</td>
	</tr>
	<tr class="row22">
		<td class="col0">0xF10-0xF17</td><td class="col1">A CD-XA decompression filter constants</td>
	</tr>
	<tr class="row23">
		<td class="col0">0xF20</td><td class="col1">B write pointer high</td>
	</tr>
	<tr class="row24">
		<td class="col0">0xF21</td><td class="col1">B write pointer low</td>
	</tr>
	<tr class="row25">
		<td class="col0">0xF22</td><td class="col1">B read pointer high</td>
	</tr>
	<tr class="row26">
		<td class="col0">0xF23</td><td class="col1">B read pointer low</td>
	</tr>
	<tr class="row27">
		<td class="col0">0xF24</td><td class="col1">B sample rate time increment high</td>
	</tr>
	<tr class="row28">
		<td class="col0">0xF25</td><td class="col1">B sample rate time increment low</td>
	</tr>
	<tr class="row29">
		<td class="col0">0xF26</td><td class="col1">B left volume</td>
	</tr>
	<tr class="row30">
		<td class="col0">0xF27</td><td class="col1">B right volume</td>
	</tr>
	<tr class="row31">
		<td class="col0">0xF28</td><td class="col1">B FIFO control (bit 7 = 1 to enable CD-XA decompression)</td>
	</tr>
	<tr class="row32">
		<td class="col0">0xF29</td><td class="col1">B interrupt control (bit 0 = 1 to enable buffer half-full IRQ)</td>
	</tr>
	<tr class="row33">
		<td class="col0">0xF30-0xF37</td><td class="col1">B CD-XA decompression filter constants</td>
	</tr>
</tbody></table></div>

<p>
Notes: 
- The filter constants for CD-XA mode are programmable.  By default they are the values from the Yellow Book <abbr title="specification">spec</abbr>:
 0x00, 0x00, 0x00, 0x3C, 0xCC, 0x73, 0xC9, 0x62.
- The two FIFO spaces do not differentiate between addresses inside of 
them: a read or write anywhere in 000-0x3FF will read/write the next 
byte for FIFO A.  On the original ASC this was true of normal sample 
playback mode but not wavetable mode.  EASC does not support wavetable 
mode.
</p>

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<h1 class="sectionedit1" id="m50753_pmus">M50753 PMUs</h1>
<div class="level1">

<p>
There are 3 major versions of this PMU. The first was found in the 
Portable and PowerBook 100. It's different from the later 2 by having a 
different response to the 0x78 “Read Interrupt Flag” command - the later
 versions use a more streamlined approach that wastes less 680×0 time 
fetching ADB data from the PMU. The second was the 140/170 (and probably
 the 145/145B?). This introduced the streamlined 0x78 command. The 
third, in the 160/180/180c, is largely similar but supports a few more 
commands and has larger code as a result. All known PMU versions fit 
into 6K (6144 bytes) of code with plenty of room to spare, however.
</p>

<p>
A datasheet for the M50753 hasn't been found, but you can get one for the almost-identical M50754 <a href="http://www.alldatasheet.com/view.jsp?Searchword=M50754" class="urlextern" title="http://www.alldatasheet.com/view.jsp?Searchword=M50754" rel="nofollow">here</a>. For information on the opcodes of the M507xx series, check out Neil Parker's <a href="http://www.llx.com/%7Enparker/a2/adb.html" class="urlextern" title="http://www.llx.com/%7Enparker/a2/adb.html" rel="nofollow">deep dive</a> into the similar M50740/50741 used in the Apple IIgs for a similar role.
</p>

<p>
The <strong>IDA Pro</strong> universal disassembler supports disassembly of these processors under the processor type “Mitsubishi 740 series (8-bit)”.
</p>

</div>

<h3 class="sectionedit2" id="x0_side_hookups">680x0 side hookups</h3>
<div class="level3">

<p>
As usual for this vintage of Macintosh, this is done through a VIA. 
There is an 8-bit bidrectional data bus and 2 handshake lines, one to 
the VIA from the PMU (PMAck), and one from the PMU to the VIA (PMReq). 
The Portable and PowerBook 100 only have 1 VIA, and so the PMU data bus 
is VIA port A while PMReq and PMAck are bits 1 and 0 of port B. On all 
later PowerBooks, VIA2 port A is the data bus while PMReq and PMAck are 
VIA2 port B bits 2 and 1.
</p>

</div>

<h3 class="sectionedit3" id="io_port_assignments">I/O port assignments</h3>
<div class="level3">

<p>
The M50753 has a bunch of I/O ports. Here's what we've currently worked out on how they're used.
</p>

<p>
Port P2 All 8 bits of this port are a bidirectional data bus to the VIA.
</p>

<p>
Port P3
</p>
<div class="table sectionedit4"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0 leftalign">Bit  </th><th class="col1 leftalign"> Function  </th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0 leftalign">7	</td><td class="col1 leftalign">PMReq handshake flag from the VIA  </td>
	</tr>
	<tr class="row2">
		<td class="col0 leftalign">6	</td><td class="col1 leftalign">PMAck handshake flag to the VIA    </td>
	</tr>
	<tr class="row3">
		<td class="col0 leftalign">5  </td><td class="col1"> </td>
	</tr>
	<tr class="row4">
		<td class="col0 leftalign">4  </td><td class="col1"> </td>
	</tr>
	<tr class="row5">
		<td class="col0 leftalign">3  </td><td class="col1">Audio subsystem power control </td>
	</tr>
	<tr class="row6">
		<td class="col0 leftalign">2	</td><td class="col1 leftalign">Power switch input: 0 = on, 1 = off  </td>
	</tr>
	<tr class="row7">
		<td class="col0 leftalign">1	</td><td class="col1 leftalign">Reset line output to 680×0           </td>
	</tr>
	<tr class="row8">
		<td class="col0"></td><td class="col1"></td>
	</tr>
</tbody></table></div>

<p>
Port P4
</p>
<div class="table sectionedit5"><table class="inline">
	<thead>
	<tr class="row0">
		<th class="col0 leftalign">Bit	</th><th class="col1 leftalign">Function  </th>
	</tr>
	</thead>
	<tbody><tr class="row1">
		<td class="col0 leftalign">3  </td><td class="col1"> </td>
	</tr>
	<tr class="row2">
		<td class="col0 leftalign">2	</td><td class="col1 leftalign">System power control: 0 = off, 1 = on  </td>
	</tr>
	<tr class="row3">
		<td class="col0 leftalign">1	</td><td class="col1 leftalign">ADB in   </td>
	</tr>
	<tr class="row4">
		<td class="col0 leftalign">0	</td><td class="col1 leftalign">ADB out  </td>
	</tr>
</tbody></table></div>

<p>
(P4 only has 4 bits)
</p>

</div>

<h3 class="sectionedit6" id="ad_assignments">A/D assignments</h3>
<div class="level3">

<p>
The M50753 has an analog-to-digital converter which is used to read the battery voltage, among other things.
</p>

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