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Home Documents Lisa WAITROM.Text
WAITROM.Text

WAITROM.Text

Lisa · TEXT
FilenameWAITROM.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads3
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Contents
.Page
;++
;
;		WaitRom
;
; WaitRom switches off both motors and then waits until the 68000 diagnostics
; sets location 000 (68K = 000C00) first to #069 and then to #096.  The 6504
; will then do a cold start of the system
;
;--
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  OUT
;	Returns via a cold start
;
;++

WaitRom	.Equ *				; Entry point for WaitRom
	Jsr	PrkClr0			; Park heads, turn motors off & clear GoByte

; Loop until 69/96 sequence occurrs

WaitRom1	Lda	000			; Wait for #069
	Cmp	#069
	Bne	WaitRom1

WaitRom2	Cmp	000			; Wait for #096
	Beq	WaitRom2

	Sec
	Adc	000			; Will be 0 if = 96
	Bne	Wait
	Rom1
	Jmp	DnWhWt			; Reset the world w/o memory wait
Home Documents Lisa WRITE.Text
WRITE.Text

WRITE.Text

Lisa · TEXT
FilenameWRITE.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads3
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Contents
.Page
;++
;
;		Write
;
; Write will write to a Disk/Side/Track/Sector after the sector
; header has been found by RdAddr.  Depending on the command, it
; will perform a checksum operation on the data.  If it is unable to
; read the address header mark after 100. tries it will recalibrate
; and try once more
;
; REGISTER
;  IN
;	All =	Any value
;  OUT
;	All =	Destroyed
;
;--

Write	.Equ *
	Jsr	CreCkSum			; Create a checksum
WriteBF	.Equ *				; Write data using host supplied checksum
	Jsr	PreNib			; Setup data fro reading across page boundaries
	Jsr	Seek
Write3	Jsr	RdAddr			; Find sector
	Bcc	Write16			; Write and if OK return to caller from Write16
	Jsr	BadAddr
	Bcc	Write3
	Lda	#SErrWr			; Write error
	Rts
Home Documents Lisa CRECKSUM.Text
CRECKSUM.Text

CRECKSUM.Text

Lisa · TEXT
FilenameCRECKSUM.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads2
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Contents
.Page
;++
;
;	CreCksum -- Create checksum using 524 byte i/o buffer
;
;	Algorithm:
;		A sector is composed of 524 user adata bytes and a 3 byte
;	checksum.  These are translated into 6 bit nibbles which are used to
;	Look up GCR codewords to be written to the disk.  The data is encode
;	as follows:  CSUMA, CSUMB, & CSUMC are "registers" used fo accumulating
;	the checksum.  ByteA, ByteB, & ByteC contain 3 bytes from the data buffer
;
;	1.	Rotate CSUMC left
;		CSUMC[65432107] <- CSUMC[76543210]
;		Carry <- CSUM[7]
;	2.	CSUMA <- CSUMA + ByteA + Carry from step 1
;	3.	ByteA <- ByteA Xor CSUMC
;	4.	CSUMC <- CSUMC + ByteB + Carry from step 2
;	5.	ByteB <- ByteB Xor CSUMA
;	6.	CSUMB <- CSUMB + ByteC + carry from Step 3
;	7.	ByteC <- ByteC Xor CSUC
;
;	Propagation of carry among three checksum bytes:
;
;         ------------------------
;	           v                   v	Note:  Carry out of CsumC is from rotate
;	^--CSUMC <-- CSUMB <-- CSUMA <--
;
; REGISTERS
;  IN
;	All =	Any valye
;  OUT
;	All =	Destroyed
;
;--
.Page

CreCksum	.Equ *				; Entry point for all callers
	Lda	#00
	Sta	Cksum1
	Sta	Cksum2			; Zero only two bytes
	Sta	InxptrL			; Init pointer for 5 cycle index fetch
	Sta	InxptrH
	Inc	InxPtrH			; Start on page 1
	Ldy	#0F4			; Last twelve bytes in page 1

CrTop	.Equ *				; Initially 'A' = 0
	Asl	A			; Move high bit to carry
	Php				; Save status bits on stack
	Adc	#00			; Move carry bit to low bit (8 bit rotate)
	Sta	Cksum3
	Plp				; Restore Status bits
	Lda	@InxPtrL,y		; First of three bytes in loop
	Tax
	Eor	Cksum3			; combine checksum w/ data
	Sta	@InxPtrL,y			; Data ==> buffer
	Txa
	Adc	CkSum1			; Add with above carry
	Sta	Cksum1
	Iny
	Bne	$20			; end of page two data
	Inc	InxPtr			; point to page three

$20	Lda	@InxPtrL,y			; Second of three bytes
	Tax
	Adc	Cksum2			; Add to second checksum byte
	Sta	Cksum2
	Txa
	Eor	Cksum1			; Combine checksum / data
	Sta	@InxPtrL			; Data ==> buffer
	Iny
	Beq	$60			; End of page three data

	Lda	@InxPtrL,y		; Third of three bytes
	Tax				; Save data value
	Eor	Cksum2			; Combine checksum w/ data value
	Sta	@InxPtrL,y		; Data ==> buffer
	Txa				; Restore data value
	Adc	Cksum3			; Add to third checksunm byte leave in A
	Iny
	Bne	CrTop			; Not at page boundary, loop
	Inc	InxPtrH			; start w/ page 2 data
	Bne	CrTop			; branch always taken

$60	Rts				; End of creating a checksum
Home Documents Lisa NEWRWADDR.Text
NEWRWADDR.Text

NEWRWADDR.Text

Lisa · TEXT
FilenameNEWRWADDR.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads2
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Contents
.Page
;++
;
;				Write Adr Field Subroutine
;
; (16 sector format) writes 27, 40-usec (10-bit) self-sync nibls, adr fields
; 16-sector start marks (0D5,0AA,096), Body (Track, Sector, Side, Volume,
; Checksum), end field marks, and the write turn off nibl.  It then jumps to
; the "WrSync" code which will write the starting sync for the data field,
; write the data fields and then return to the caller.
;--

	.Org	1200
WrSynTrK	.Equ *			; Write a sync track before first track
	Ldy	#00		; 256 sync bytes * 6 to write (about 2 sectors)
	Beq	WrAdr01

WAdr16	.Equ *
	Ldy	FmtGap		;		Default to 6*5 20 usec 'FF's

WrAdr01	Bit	IIob+Track	;		Look for bit six
	Bvc	$23
	Lda	#01
	Ora	IIob+Side
	Sta	IIob+side		;		set bit zero in side

$23	Lda	#1		;		flag for usage of AdrMk 1 & 2
	Jsr	Sync20		; 6	10/10	Write sync fields
	Lda	AdrMk3		; 3	19	Last byte in starting bitslip
	Jsr	WrNibl1		; 6

	Ldy	#02		; 2
$37	Ldx	IIob+Side,y	; 4		Write Track, Sector, then Side
	Jsr	WrByteX		; 6
	Dey
	Bpl	$37

	Ldx	FmtType		; 3	9	Format type
	Jsr	WrByteX		; 6	13/6
	Lda	IIob+Track	; 3	9	Create Address Checksum
	Eor	IIob+Sector	; 3	12
	Eor	IIob+Side		; 3	15
	Eor	FmtType		; 3	18
	Jsr	WrByte		; 6	24/6	Write the address checksum

	Lda	AdrMk4		; 3	9
	Jsr	WrNibl		; 6
	Lda	AdrMk5		; 3	9	Last byte in address field
	Jsr	WrNibl		; 6

	Jsr	ShtOff		; 6	16	Return to Sense mode
	Lda	#ErrHdr		; 2		UnderRun during header
	Bcs	WstTm		; 2,3		Abort upon error
	Jmp	Write16		; 3		Go & write data to disk


WstTm	Rts			; 6	10

.Page
;++
;			RdAdr
;--

RdAdr	.Equ *
	Lda	#0
	Sta	RangeL
	Lda	#RdAdrTmt
	Sta	RangeH
	Jsr	SetRMode		; Setup PAL on Sony to read mode
	Lda	Q6L		; Switch from SENSE to READ

RdAsyn	Inc	RangeL		; 5
	Bne	RdAd1		; 2,3
	Dec	RangeH		; 5
	Beq	RaErr1		; 2,3

RdAd1	Ldx	#00
$24	Lda	Q7L		; 4...
	Bmi	RdAsn1		; 2,3	Valid if high bit = 1
	Dex			; 2
	Bne	$24		; 2,3	Loop 255 times = 85 bytes
	Beq	RaErr1		; 3

RdAsn1	Cmp	AdrMk1		; 2	Address mark 1?
	Bne	RdAsyn		; 2,3	Branch if not

RdAd2	Lda	Q7L		; 4...
	Bpl	RdAd2		; 2,3
	Cmp	AdrMk2		; 2...	Address mark 2?
	Bne	RdAsn1		; 2,3

RdAd3	Lda	Q7L		; 4...
	Bpl	RdAd3		; 2,3
	Cmp	AdrMk3		; 2...
	Bne	RdAsn1		; 2,3

; Marks read now read address
; Carry is set

	Ldx	#AdrsLen		; 2
	Lda	#000		; 2	Clear CSum
Rfld	Sta	CSum		; 3	27
RdAd4	Ldy	Q7L		; 4
	Bpl	RdAd4		; 2	6	Do again if no valid data
	Lda	DNibl,y		; 4	12	Unpack the data
	Sta	CsmFnd,X		; 4	16	Store in FOUND table
	Eor	CSum		; 3	19	Update the checksum
	Dex			; 2	21	Next field
	Bpl	Rfld		; 2,3	24	Loop until "x" become negative
	Tax			; 2		If "CSum" = 0 then AOK
	Bne	RaErr5		; 2,3		No OK, signal on error

; Now compare against two final bytes and make sure at right track and sector

RaSlp1	Lda	Q7L		; 4...
	Bpl	RaSlp1		; 2,3
	Cmp	AdrMk4		; 2...
	Bne	RaErr2		; 2,3
	Lda	#01		; 2
	Bit	SdFnd		; 3
	Beq	RaSlp2		; 2,3
	Lda	#40
	Ora	TrkFnd
	Sta	TrkFnd

RaSlp2	Lda	Q7L		; 4...
	Bpl	RaSlp2		; 2,3
	Cmp	AdrMk5		; 2...
	Bne	RaErr2		; 2,3
	Lda	IIob+Track	; 3
	Cmp	TrkFnd		; 2
	Bne	RaErr4		; 2
	Lda	IIob+Sector	; 3
	Cmp	SecFnd		; 2
	Bne	RaErr3		; 2
	Clc			; 2... No error
	Lda	VolFnd		; Load the disk ID value just read.
	Sta	Iob+DiskID	; Tell host about what type of disk it is
RaExit	Clv			; Clear the overflow bit (previously used for FATAL)
RaExit1	Lda	Q6H		; Switch back from READ to SENSE
	Rts
;  We abort upon seeing first error-no matter what it is.  These all get reset
;  on seeking (even micro stepping).

RaErr1	Inc	RaStrt		; Start bitslip error -- Fatal error
	Sec
	Bcs	RaExit

RaErr2	Inc	RaEnd		; Ending bitslip error
	Sec
	Bcs	RaExit

RaErr5	Inc	RaCSum		; Checksum error
	Sec
	Bcs	RaExit

RaErr4	Inc	RaTrk		; Track error
RaErr6	Sec	
	Bcs	RaExit
Home Documents Lisa SEEK.Text
SEEK.Text

SEEK.Text

Lisa · TEXT
FilenameSEEK.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads2
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Contents
.Page
;++
;		Seek
;--
;
; REGISTERS
;  OUT
;	All =	Destroyed
;
; CALLS
;
;++
.Page


Seek	.Equ *
	Jsr	Init			; Global setup routine & return w/ 'a' = 0
	Jsr	CmdClnUp			; Clear GoByte and ErrStat

SeekAlt	.Equ *				; Alternate entry w/o 'init' of variables
	Ldx	#00
	Stx	TrkFlg			; Assume no head movement & motor already on
	Stx	MtrFlg
	Stx	Direct			; Assume '0' (toward spindle) direction
	Dex
	Stx	HostSeek			; Tell 68K that I am seeking

	Lda	MtrOn			; if = 'FF' then motor is already on
	Bne	$20
	Dec	MtrFlg			; tell me to wait full 400 msec
	Jsr	TrnMtrOn			; turn the motor on

$20	Lda	IIob+Track
	Cmp	CurTrack
	Bne	Seek1			; Wrong track
	Lda	MtrFlg
	Beq	SeekEnd			; same track and motor already on so select side
	Bne	JstMtr			; Just wait for motor to settle

Seek1	.Equ *				; 'A' has IIob+Track already
	Dec	TrkFlg			; Indicate that needs head positioning
	Sec
	Sbc	CurTrack			; Abs(destination-current) = amt to move
	Bcs	pstv			; If ccC = 1 then positive result
	Eor	#0FF
	Adc	#1			; Take two's complement
	Inc	Direct			; Set outward direction (away from spindle)

pstv	.Equ *
	Sta	StpAmt
	Lda	HeaDelay			; Assume only wait forf head settling
	Sta	Delay

Seek2	.Equ *
	Jsr	TrkClss			; Return w/ 'Y' = class of IIob+Track
	Cpy	CurClass
	Beq	$60
	Jsr	SetSpdy			; Set the speed w/ 'Y' = trk class index
	Lda	StpAmt
	Jsr	ClcScDly			; Calc speed change delay time, return in 'A'
	Sta	Delay
$60	Jsr	DoSeek			; Finally do the actual seek

JstMtr	Lda	MOnDly
	Ldx	MtrFlg
	Bne	$80
	Lda	Delay
$80	Jsr	Wait			; Wait for motor, speed change, & head settling
	Lda	IIob+Track
	Sta	CurTrack
	Jsr	SpdChk			; Check the speed & adjust if neccessary
SeekEnd	.Equ *
	Jsr	TrnMtrOn			; For flakey PAL problems
	Ldx	#0
	Stx	HostSeek			; No more seeking
	Jmp	SelSide			; Select proper side

;++
;
;		ProgErr
;
; This code will do many things.  It will either deselect the drive, turn off
; the motors, park the heads first, clear the GoByte, and ErrStat, and maybe
; jump to itself forever.
;
;
; REGISTERS
;  IN
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  OUT
;	ALL =	Destroyed
;
;--

ESAD	.Equ *				; Used by drop dead command
	Jsr	PrkClr0			; Turn off motor and clear the GoByte
ProgErr1	Jmp	ProgErr1			; Loop forever!
PrkClr0	.Equ *				; Park the heads and clear the GoByte
	Jsr	MtrOff
	Lda	#00
	Jmp	CmdClnUp
Home Documents Lisa RECAL.Text
RECAL.Text

RECAL.Text

Lisa · TEXT
FilenameRECAL.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads2
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Contents
.Page
ClcScDly	.Equ *
	Cmp	#13
	Bcs	$43			; If 'a' >= 13 then only wait for head settling
	Tay				; Save the number of steps
	Lda	#0			; ccC already = '0'
$31	Adc	#2			; Use 10 msec/Step instead of 12 msec
	Dey
	Bne	$31
	Sta	Temp1
	Lda	ScDly
	Sec
	Sbc	Temp1
	Bcs	$65			; If ccC=1 then result is positive
$43	Lda	HeaDelay			; Assume only wait for head settling
	Rts
$65	Cmp	HeaDelay			; See if head settling time is also included
	Bcc	$43
	Rts

;++
;		Recalbrt
;--
RecalMtr	.Equ *
	Lda	MtrOn
	Bne	Recall			; If motor is not on then turn it on & wait 400ms
	Jsr	TMOn

Recalbrt	.Equ *				; Entry point for Recalbrt
Recall	.Equ *
	Ldy	#0
	Sty	CurTrack
	Jsr	SetSpdy			; Set CurClass to '0' also
	Dey
	Sty	HostSeek			; Tell 68K that I am seeking
	Ldx	#Inward
	Jsr	SetDrctX
	Ldx	#RclStep
	Stx	Temp3			; 3 steps awau from track 00 for bad power supply
$06	Jsr	DoStep			; step away from track 0
	Dec	Temp3
	Bne	$06			; Loop 2 times for 3 total steps
	Lda	#TurnRnd			; Must wait for stepper to come to it's senses
	Jsr	Wait

	Ldx	#TmOutRcl
	Stx	Temp3			; Timeout if unable to leave track 0 being true
$17	Jsr	ReadIndx			; Read track 0 line
	Bcs	$21			; If ccC = 1 then /Trk00 is false
	Jsr	DoStep			; Step away from track 00 ( direction is already set )
	Dec	Temp3			; Maximum of 80 steps
	Bne	$17			; Loop while less than 80 steps
	Beq	$72			; Abort upon underflow

$21	Ldx	#Outward
	Jsr	SetDrctX			; Seek away from spindle toward Track 00
	Stx	Temp2
$43	Dec	Temp2			; For each step save a counter
	Beq	$78			; Abort upon underflow
	Jsr	DoStep
	Jsr	ReadIndx
	Bcs	$43
	Lda	#TmOutRcl
	Sbc	Temp2			; Result will be positive & = number of steps
	Jsr	ClcScDly			; Calc speed change delay time, return in 'A'
	Jsr	Wait			; Now wait for about 150 ms
	Jsr	SpdChk			; Check/Adjust the speed at track 0 & return error
$68	Ldx	#0
	Stx	HostSeek			; Done seeking
	Rts

$72	Lda	#DErrTk0			; Unable to leave track 0 behind
	Bne	$82

$78	Lda	#DErrCal			; Timeout during recal constant
$82	Sta	Iob+DrvError
	Sec
	Bcs	$68

.Page

ClpEnty	.Equ *				; Entry point used by clamp command
Clamp	.Equ *				; Entry point for clamp
	Rts
.Page
;++
;
;		uSWait
;
; ****
; *  The followig codes assume
; *  a cycle time of 0.5 uSec
; ****
;
; Delays a specified number of 100 uSec intervals for timing purposes
; a call to uSWait takes E X A C T L Y (A-reg * 100 uSec) to complete,
; including the Jsr-Rts, therefore the following code takes 301 uSec to
; execute:
;	Lda	#3		  1 uSec (  2 Cycles)
;	Jsr	uSWait		300 uSec (600 Cycles)
;
;--
;
; REGISTERS
;  IN
;	A =	Number of 100 uSec intervals to delay
;	X =	Any value
;	Y =	Any value
;  OUT
;	A =	Destroyed
;	X =	Destroyed
;	Y =	Unchanged
;--

WaitAlt	.Equ *				; Alternate entry point fo DoStep
	Lda	StpDly			; Load delay time

uSWait	.Equ *				; Entry point for uSWait
	Ldx	#023			; (2)
uSWait1	Dex				; (2)
	Bne	uSWait1			; (3,2)
	Ldx	#026			; (2)
	Nop				; (2)
	Sec				; (2)
	Sbc	#001			; (2)
	Bne	uSWait1			; (3,2)
	Nop				; (2)
	Rts				; (6)

.Page
;++
;
;			Wait
;
;  Wait A-reg times 5 miliseconds
;
;--
;
; REGISTERS
;  IN
:	A =	Number of 5 msec intervals to wait
;	X =	Any value
;	Y =	Any value
;  OUT
;	A =	Destroyed
;	X =	Destroyed
;	Y =	'0'
;
; CALLS
;	uSWait	Wait A-reg number of 100 uSec intervals
;--

Wait	.Equ *				; Entry point for wait
	Tay
Wait1	Lda	#50.			; Call uSWait for 50*100 = 5000 uSec
	Jsr	uSWait
	Dey
	Bne	Wait1
	Rts
Home Documents Lisa PRENIB.Text
PRENIB.Text

PRENIB.Text

Lisa · TEXT
FilenamePRENIB.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads2
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Contents
.Page
;++
;
;		New PreNibble routine
;	This routine will create 5 bytes ( 4 from the 524 byte i/o buffer and
;	one from the checksum ) and will save them in the zero page for use
;	during the writing operation.  It is a brute force operation, reading
;	will call a routine that will combine theh top 2 bits of each into
;	one byte that is returned within the 'A' register.
;
;	Buffer[1] == >AAAAAAAA<
;	Buffer[2] == >BBBBBBBB<
;	Buffer[3] == >CCCCCCCC<
;	Result :=  Nibl[00AABBCC]
;--
;
;	REGISTERS
;		ALL == DESTROYED
;
;	Local Equates
;--

C1BTo1	.Equ 02FF
C1BTo2	.Equ 0300
C1BTo3	.Equ 0301

C2BTo1	.Equ 03FE
C2bTo2	.Equ 03FF

;++
;	Global Equates
;		CkSum1
;		CkSum2
;		CkSum3
;		CpCkSum
;		CpBy01
;		CpBy02
;--
.Page
PreNib	.Equ *				; Entry point for all callers
	Ldy	C1BTo1
	Ldx	C1BTo2
	Lda	C1BTo3
	Jsr	Fr3To1
	Sta	CpBy01			; Save the new composite byte

	Ldy	C2BTo1
	Ldx	C2BTo2
	Lda	#00			; Only two bytes in this one
	Jsr	FrTo1
	Sta	CpBy02			; Save the new composite byte

	Ldy	CkSum1
	Ldx	CkSum2
	Lda	CkSum3
	Jsr	Fr3To1
	Sta	CpCkSum
	Rts				; Back to the caller
Home Documents Lisa READ.TEXT
READ.TEXT

READ.TEXT

Lisa · TEXT
FilenameREAD.TEXT
Size0.00 MB
Subsection firmware / ROM88
Downloads2
Enjoying MacTrove? Anonymous downloads are free and unlimited. Create a free account to track favorites, contribute metadata corrections, and join the community chat.
Contents
.Page
;++
;
;		Read
;
; Read will read a sector from Drive/Side/Track/Sector, doing offtrack
; stepping if neccessary to find the data.  It will also verify the
; checksum found if commanded to do so.
;
; REGISTERS
;  IN
;	All =	Any value
;  OUT
;	All =	Destroyed
;
; CALLS
;	Seek	Seeks to Drive/Track/Side
;	RdAdr	Read address header field
;	Read16	Reads data and checksum
;	VfyCkSum	Verifies checksum that was read
;	BadAddr	Handles all errors during read
;++

ReadBf	.Equ *				; Read w/o checksum verify entry point
	Lda	#0FF
	Bne	Read01

Read	.Equ *
	Lda	#00
Read01	Sta	RwCsmFlg			; Save in global flag
	Jsr	Seek			; Seek to track, zero error cnts, init retry
Read1	Jsr	RdAdr			; Find Sector
	Bcs	Read3			; Error, go and check it
	Jsr	Read16			; Read the sector
	Bcs	Read3
	Ldx	RwCsmFlg			; Fetch the checksum flag
	Bne	Read4			; If <> 0 then ignore checksum verify
	Jsr	VfyCkSum			; Verify the checksum
	Bcc	Read4			; If carry clear, then all is fine
	Inc	CSError			; Increment the checksum error counter

Read3	Jsr	BadAddr			; Find out what went wrong ( ccC = 1)
	Bcc	Read1			; Try once more
	Lda	#SErrRd			; No goog, signal read error
Read4	Rts
.Page
;++
;		BadAddr
;--
;
; REGISTERS
;  IN
;	All =	Any value
;  OUT
;	All =	Destroyed
;	Carry =	Retry status (=Clear, don't retry; =Set, please retry)
;
; CALLS
;	Recalbrt	Recalibrate the drive
;	SeekAlt	Seek to Track/Side
;--
.Page
BadAddr	.Equ *				; Entry point of BadAddr (ccC =1)
	Dec	RetryCnt			; If we've tried enough times to find data
	Beq	BadAddr2
	Clc
	Lda	RaStrt			; Or we can't find start bitslip
	Adc	RaTrk			; Or we're on the wrong trk
	Beq	BadGood			; Try again
	Cmp	RecalCnt			; if >= recalibration count then abort
	Beq	BadBad			; ccC = 1 when A = memory
	Cmp	RtyFlg			; See if new RaStrt or RaTrk error
	Beq	BadGood			; If equal then no change from last time
	Sta	RtyFlg			; a change -- save new error count
	Bne	BadAddr4			; Recalibrate head location
BadAddrd2	Dec	RecalCnt
	Beq	BadBad			; abort upon timeout (ccC still = 1)

BadAddr4	Jsr	Recalbrt			; But don't bother with spd errors at this time
	Jsr	SeekAlt			; And get back to where we were on target track
	Lda	MaxRetry			; Pick up fresh maximum number of retrys count
	Sta	RetryCnt			; and refresh the counter
BadGood	Clc				; We're trying again mate!
BadBad	Rts
Home Documents Lisa LOOP.Text
LOOP.Text

LOOP.Text

Lisa · TEXT
FilenameLOOP.Text
Size0.01 MB
Subsection firmware / ROM88
Downloads3
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Contents
.Page
;++
;
;			RESTART
;
; Restart is the entry point after a reest to the 6504.  This is also reffered
; to as a cold start.  It will first wait for memory to be valid, then it will
; setup the stack, reset the drives, clear all of the used RAM, transfer all
; "soft" parameters from the ROM to the RAM, initialize all timing constants,
; Check for Disk In Place and clamp any disks that are there, raise the DISK
; DIAG line and then finally look for a command.
;
;--
;
; REGISTERS
;  In
;	Random values assumed
;  Out
;	All Destroyed
;++
.Page
;++

Restart	.Equ *				; Main entry point for the 6504 from reset

;	Clear decimal mode;
;	Disable interrupts to the 6504;
;	Switch off interrupt to the 68K;
;	Set stack pointer to 0B0;
;	Enable MEMPOY for 68K

	Cld				; Clear decimal mode
	Sei				; Mask off interrupts
					; Following 3 steps needed only for warm restart
DnWhWt	Sta	BootL			; Tell host I'm not ready yet
	Sta	FDirL			; Set FDir Low, no interrupt yet to the 68K
	Sta	DisL			; Enable 68K to read memory
	Ldx	#StackSt
	Txs				; Set stack to grow down from 01CF
	Jsr	HardInit			; Initialize hardware -- PWM, IWM, Latches
	Jsr	RomTest			; Will never return if error is found
	Jsr	RamTest			; currently an Rts
	Lda	#00
	Jsr	Wait			; Wait for Sony to power up -- about 1.25 second

;	For x:=#LstUsed DOWNTO 000 DO			Reset variable memory for 6504
;	   Mmemory,x := 000;			This resets all counters to 000

	Ldx	#LstUsed			; Length of variable area
	Lda	#00			; something to clear with
Restart1	Sta	GoByte,x			; Init to 0
	Dex
	Bne	Restart1
	Sta	GoByte			; and do the last/first byte

;	For x:=sharesz down to 0 do			Initialize shared variables
;	   ShareRam,x := ShareRom,x;

	Ldx	#SharesZ			; Length of shared variable space
Restart2	Lda	ShareRom,X		; Move Bytes from Rom
	Sta	ShareRam,X		; and into RAM
	Dex				; Next Byte
	Bpl	Restart2			; Done yet?

	Ldx	#4			; move 5 bytes, zero based
Xfer1	Lda	SavAdr,x
	Sta	AdrMk1,x			; initialize Address mark table
	Lda	SavDat,x
	Sta	DatMk1,x			; initialize Data mark table
	Dex
	Bpl	Xfer1

	Dec	KOff
	Ldx	#CmdLength
	Stx	CmdX			; Index for command saving
	Ldx	#SavIndex
	Stx	SaveL

	Lda	MaxDDly
	Sta	WtHih
	Bne	Loop1			; Must see if a disk is inserted

;	*** NOTE *** Loop must be the very next routine
.Page

;++
;
;			LOOP
;
; This is the main 'idle' loop where the 6504 spends most of its time when not
; doing anything useful.  The main functions of the 'LOOP' is to shut off the
; motors after they have been used, sample the DIP and BUTTON when needed,
; and look for commands from the 68K.
;
; REGISTERS
;  In
;	A =	Any value
;	X =	Any value
;	Y =	Any value
;  Out
;	Loop never exits, only calls other procedures
;
; CALLS
;	GetDIP	Get the DIP status
;	Trnrk	Park the heads and turn off the motors
;	Cmd	Interprets, syntax checks, and dispatches all commands
;
;++
.Page

;++
;	Decrement 3 byte counter.  When all 3 bytes = 0 then turn motors off
;	( even if they are already off ), & look for disk in place
;--

Loop	.Equ *			; Start of main loop
	Inc	ImAlive
	Dec	WtLow		; Decremnent low byte of motor off wait
	Bne	Loop2
	Dec	WtMid		; Decrement Middle byte
	Bne	Loop2
Loop1	.Equ *			; Entry point for immediate check of DIP
	Jsr	GetDIP		; Time to make some noise and get some status
	Dec	WtHih		; Decrement high byte
	Bne	Loop2
	Jsr	TrMtOff		; turn off motor and reset motor on flag to zero
	Lda	MaxDDly
	Sta	WithHih

Loop2	Lda	Iob+GoByte
	Bpl	Loop
	Jsr	Cmd		; Try to execute the command
	Jmp	Loop		; Go back to the loop ands spin some more

.Page
;++
;		ROMTest
;--

RomTest	.Equ *			; Entry point to test checksum of Eprom
	Rts
	Lda	#0
	Tay
	Sta	RangeL
	Sta	RangeH
	Sta	InxPtrL
	Lda	#10
	Sta	InxPtrH
	Tax
$21	Clc
	Iny			; y = +1
	Lda	RangeL
	Adc	@InxPtr,y		; This should be (InxPtr),y   ARS 12 JAN 89
	Sta	RangeL
	Dey			; y = +0
	Lda	RangeH
	Adc	@InxPtr,y
	Sta	RangeH
	Clc
	Bpl	$43
	Sec
$43	Rol	RangeH
	Rol	RangeH
	Iny
	Iny			; Y = +2
	Bne	$21
	Lda	RangeL
	Bne	RomErr
	Lda	RangeH
	Beq	RamTest
RomErr	Sta	Iob+DrvError
	Sta	DisL		; Enable 68K to read memory
	Sta	BootH		; And reset flag line also
	Jmp	ProgErr1		; Bad Eprom -- tell host & loop forever

RamTest	.Equ *			; Test for bar Ram
	Rts

;++
;
;			GetDIP
;
; REGISTERS
;
;	All are destroyed
;
; CALLS
;	UpdInt	Updates interrupt status and raises FDir if needed
;	ReadDIP	Read DIP status
;	EnblTest	Test IMsk	against x-reg if drive is enabled
; Note:
;	Should code ever get modified for a two drive system, this should
; be re-written to alow commands to be received during the one second wait
;++
.Page

GetDIP	.Equ *				; Entry point for GetDIP
	Lda	DrvConn
	Bne	$40			; if <> 0 then drive is connected
	Jsr	ChkDrv			; check for drive connected & number of sides
	Bcs	GetDip5			; Exit if still no drive connected
$40	Sta	BootL			; Set flag to tell host I'm busy
	Jsr	ReadDIP			; Read the status of the DIP into carry
	Bcs	GetDIP4			; ccC = 1 ==> no DIP -- clear Clamped Disk Flag
	Lda	Clamped			; Already a clamped disk?
	Bne	GetDIP5			; No, need to clamp if not already clamped

	Lda	#OneSec			; One second wait constant
	Jsr	Wait			; Wait for Sony drive to return to it's senses
	Jsr	ReCalMtr			; Turn on motor & make sure head is at track 0
	Dec	Clamped			; Set clamped falg to 'FF'

	Jsr	EnablTest			; If drive enabled then tell host disk inserted
	Bcc	GetDIP5			; If carry set then disk enabled

	Lda	#010			; use drive 80
GetDIP2	Ora	Ist			; Combine with current Ist
	Sta	Ist
	Bne	GetDIP5

GetDIP3	.Equ *

GetDip4	Lda	#00
	Sta	Clamped			; Tell me no disk is clamped

GetDIP5	.Equ *				; Fall through and test for button pressed
	Sta	BootH			; Clear busy flag to host
					; Fall thru & update interrupt to host ( maybe )

.Page

UpdInt	.Equ *				; Entry point for UpdInt

; Ist.7 := Ist.6 or Ist.5 or Ist.4;

	Lda	Ist
	And	#070
	Beq	UpdInt2			; Skip if none is on
	Ora	#080			; Set bit 7 if any bit is on
	Sta	Ist			; And put back into Ist

; if (Ist.7 and Imsk.7) then
;    FDir := High
; Else
;    FDir := Low
; Return from UpdInt

UpdInt2	And	Imsk			; Now test against the mask
	Sta	OkToGo			; Remember if an interrupt is pending
	Beq	UpdInt3			; Skip if no interrupt is pending
	Sta	FDirH			; Raise interrupt
	Rts
UpdInt3	Sta	FDirL			; Clear interrupt
	Rts
Home Documents Lisa NREAD16.Text
NREAD16.Text

NREAD16.Text

Lisa · TEXT
FilenameNREAD16.Text
Size0.00 MB
Subsection firmware / ROM88
Downloads3
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Contents
.Page
;++
;
;		NRead16
;
;	NRead16 assumes that the disk is spinning at the proper speed
; and the head is located at the proper Side/Track and that the header
; for the sector desired has already been found.  First it will read in
; the beginning data marks, then the data, and finally the trailing data
; bytes.  It will abort if the proper starting or ending sequence of
; data bytes is not found.
;
; REGISTERS
;  IN
;	All =	Any value
;  OUT
;	All =	Destroyed
;
;--

.Org	1800
.Page
Read16	.Equ *
	Jsr	SetRMode			; Setup PAL on Sony to read mode
	Jsr	RDSynTop			; Read the sync nibbles
	Bcc	$03			; If bitslip marks found then carry = 0
	Rts
$03	Ldy	#0F4			; 2	15	First time only 12 bytes
RdBF01	.Equ *
	Inc	InxPtrH			; 5	28	Point to next page
RdBF02	.Equ *
	Ldx	Q7L			; 4
	Bpl	RdBF02			; 2,3
	Lda	DNibl,x			; 4	10	Map from 8 bits ==> 6 bits
	Asl	A			; 2	12
	Asl	A			; 2	14
	Tax				; 2	16	Save temporarily
	Asl	A			; 2	18
	Asl	A			; 2	20
	Sta	Temp1			; 3	23	>BBCC0000<
	Txa				; 2	25
	And	#0C0			; 2	27	>AA000000<

$10	Ldx	Q7l			; 4		Read low bits of byte A
	Bpl	$10			; 2,3
	Ora	DNibl,x			; 4	10	Combine low and high bits
	Sta	@InxPtrL,y		; 6	16
	Lda	Temp1			; 3	19	>BBCC0000<
	Iny				; 2	21
	Bne	$20			; 2,3	23/24
	Inc	InxPtrH			; 5	28	Point to next page

$20	Ldx	Q7L			; 4		Read low bits of byte B
	Bpl	$20			; 2,3
	And	#0C0			; 2	8	>BB000000<
	Ora	DNibl,x			; 4	12	Add low & high bits
	Sta	@InxPtr,y			; 6	18
	Iny				; 2	20
	Beq	RdCSM01			; 2/3	22/23
	Lda	Temp1			; 3	24	>BBCC0000<
	Asl	A			; 2	26
	Asl	A			; 2	28

$30	Ldx	Q7L			; 4		Read low bits of byte C
	Bpl	$30			; 2,3
	And	#0C0			; 2	8	>CC000000<
	Ora	@DNibl,x			; 4	12	Add low and high bits
	Sta	@InxPtr,y			; 6	18
	Iny				; 2	20
	Beq	RdBF01			; 2/3	22/23	Inc to next page if = 0
	Bne	RdBF02			; 3	25	Branch always taken

.Page
RdCSM01	.Equ *				;		Read 4 bytes of checksum
	Ldx	Q7L			; 4
	Bpl	RdSCM01			; 2,3
	Lda	DNibl,x			; 4	10	Map from 8 bits ==> 6 bits
	Asl	A			; 2	12
	Asl	A			; 2	14
	Tay				; 2	16	>AABBCC00<
	And	#0C0			; 2	18	>AA000000<

$10	Ldx	Q7L			; 4		Read low bits of byte A
	Bpl	$10			; 2,3
	Ora	Dnibl,x			; 4	10	Add low and high bits
	Sta	Cksum1			; 3	13
	Tya				; 2	15
	Asl	A			; 2	17
	Asl	A			; 2	19
	Tay				; 2	21	>BBCC0000<
	And	#0C0			; 2	23	>BB000000<

$20	Ldx	Q7L			; 4		Read low bits of byte B
	Bpl	$20			; 2,3
	Ora	DNibl,x			; 4	10	Add high and low bits
	Sta	Cksum2			; 3	13
	Tya				; 5	15
	Asl	A			; 2	17
	Asl	A			; 2	19	>CC000000<

$30	Ldx	Q7L			; 4		Read low bits of byte C
	Bpl	$30			; 2,3
	Ora	DNibl,x			; 4	10	Combine low and high bits
	Sta	Cksum3			; 3	13

Rd9	Lda	Q7L			; 4		Check bitslip mark 1
	Bpl	Rd9			; 2,3
	Cmp	DatMk4			; 3
	Bne	BSErr			; 2,3

Rd10	Lda	Q7L			; 4		Check bitslip mark 2
	Bpl	Rd10			; 2,3
	Cmp	DatMk5			; 3
	Bne	BSErr			; 2,3
	Clc
RdExit	Lda	Q6H			;		Sense mode
RdWaste	Rts

.Page
BSErr	Inc	BSCnt			; Trailing bitslip mark & error counter
	Sec
	Bcs	RdExit			; Return to Sense mode & exit


CSErr	Inc	CsErr			; Checksum error counter
RdErr	Sec
	Bcs	RdExit

RdErr2	Inc	StSlp			; Starting bitslip error count
	Sec
	Bcs	RdExit

RdSynTop	.Equ *				; Starting to read starting bitslip marks
	Lda	Q6L			; Subroutine to read starting bitslip marks
	Ldx	#000			; Switch from sense to read mode
	Ldy	#NiblRetr			; No. of retries allowed for bitslip read
RSync	Dey
	Beq	RdErr2

RS1	Lda	Q7L			; 4
	Bpl	RS1			; 2,3	6
RSync1	Cmp	DatMk1			; 3	9	Data mark 1
	Bne	RSync			; 2,3	11,12

	Stx	InxptrL			; 3	14
RS2	Lda	Q7L			; 4
	Bpl	RS2			; 2,3	6
	Cmp	DatMk2			; 3	9	Data mark 2
	Bne	RSync1			; 2,3	11,12

	Stx	InxptrH			; 3	14
RS3	Lda	Q7L			; 4
	Bpl	RS3			; 2,3	6
	Cmp	DatMk3			; 3	9	Data mark 3
	Bne	RSync1			; 2,3	11,12
	Clc				; 2	13

RS4	Lda	Q7l			; 4		Read sector number ( unchecked )
	Bpl	RS4			; 2,3	6
	Rts				;		Back to caller
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